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Commit1958b5fc40("x86/boot: Add early boot support when running with SEV active") can occasionally cause system resets when kexec-ing a second kernel even if SEV is not active. That's because get_sev_encryption_bit() uses 32-bit rIP-relative addressing to read the value of enc_bit - a variable which caches a previously detected encryption bit position - but kexec may allocate the early boot code to a higher location, beyond the 32-bit addressing limit. In this case, garbage will be read and get_sev_encryption_bit() will return the wrong value, leading to accessing memory with the wrong encryption setting. Therefore, remove enc_bit, and thus get rid of the need to do 32-bit rIP-relative addressing in the first place. [ bp: massage commit message heavily. ] Fixes:1958b5fc40("x86/boot: Add early boot support when running with SEV active") Suggested-by: Borislav Petkov <bp@suse.de> Signed-off-by: Kairui Song <kasong@redhat.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Cc: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de Cc: mingo@redhat.com Cc: hpa@zytor.com Cc: brijesh.singh@amd.com Cc: kexec@lists.infradead.org Cc: dyoung@redhat.com Cc: bhe@redhat.com Cc: ghook@redhat.com Link: https://lkml.kernel.org/r/20180927123845.32052-1-kasong@redhat.com
105 lines
2.0 KiB
ArmAsm
105 lines
2.0 KiB
ArmAsm
/*
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* AMD Memory Encryption Support
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*
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* Copyright (C) 2017 Advanced Micro Devices, Inc.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/processor-flags.h>
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#include <asm/msr.h>
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#include <asm/asm-offsets.h>
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.text
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.code32
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ENTRY(get_sev_encryption_bit)
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xor %eax, %eax
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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push %ebx
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push %ecx
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push %edx
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/* Check if running under a hypervisor */
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movl $1, %eax
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cpuid
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bt $31, %ecx /* Check the hypervisor bit */
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jnc .Lno_sev
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movl $0x80000000, %eax /* CPUID to check the highest leaf */
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cpuid
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cmpl $0x8000001f, %eax /* See if 0x8000001f is available */
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jb .Lno_sev
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/*
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* Check for the SEV feature:
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* CPUID Fn8000_001F[EAX] - Bit 1
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* CPUID Fn8000_001F[EBX] - Bits 5:0
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* Pagetable bit position used to indicate encryption
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*/
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movl $0x8000001f, %eax
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cpuid
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bt $1, %eax /* Check if SEV is available */
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jnc .Lno_sev
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movl $MSR_AMD64_SEV, %ecx /* Read the SEV MSR */
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rdmsr
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bt $MSR_AMD64_SEV_ENABLED_BIT, %eax /* Check if SEV is active */
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jnc .Lno_sev
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movl %ebx, %eax
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andl $0x3f, %eax /* Return the encryption bit location */
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jmp .Lsev_exit
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.Lno_sev:
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xor %eax, %eax
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.Lsev_exit:
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pop %edx
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pop %ecx
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pop %ebx
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#endif /* CONFIG_AMD_MEM_ENCRYPT */
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ret
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ENDPROC(get_sev_encryption_bit)
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.code64
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ENTRY(set_sev_encryption_mask)
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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push %rbp
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push %rdx
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movq %rsp, %rbp /* Save current stack pointer */
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call get_sev_encryption_bit /* Get the encryption bit position */
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testl %eax, %eax
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jz .Lno_sev_mask
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bts %rax, sme_me_mask(%rip) /* Create the encryption mask */
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.Lno_sev_mask:
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movq %rbp, %rsp /* Restore original stack pointer */
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pop %rdx
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pop %rbp
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#endif
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xor %rax, %rax
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ret
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ENDPROC(set_sev_encryption_mask)
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.data
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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.balign 8
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GLOBAL(sme_me_mask)
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.quad 0
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#endif
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