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03ffbcdd78
Pull irq updates from Thomas Gleixner:
"The irq department delivers:
- Expand the generic infrastructure handling the irq migration on CPU
hotplug and convert X86 over to it. (Thomas Gleixner)
Aside of consolidating code this is a preparatory change for:
- Finalizing the affinity management for multi-queue devices. The
main change here is to shut down interrupts which are affine to a
outgoing CPU and reenabling them when the CPU comes online again.
That avoids moving interrupts pointlessly around and breaking and
reestablishing affinities for no value. (Christoph Hellwig)
Note: This contains also the BLOCK-MQ and NVME changes which depend
on the rework of the irq core infrastructure. Jens acked them and
agreed that they should go with the irq changes.
- Consolidation of irq domain code (Marc Zyngier)
- State tracking consolidation in the core code (Jeffy Chen)
- Add debug infrastructure for hierarchical irq domains (Thomas
Gleixner)
- Infrastructure enhancement for managing generic interrupt chips via
devmem (Bartosz Golaszewski)
- Constification work all over the place (Tobias Klauser)
- Two new interrupt controller drivers for MVEBU (Thomas Petazzoni)
- The usual set of fixes, updates and enhancements all over the
place"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (112 commits)
irqchip/or1k-pic: Fix interrupt acknowledgement
irqchip/irq-mvebu-gicp: Allocate enough memory for spi_bitmap
irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity
nvme: Allocate queues for all possible CPUs
blk-mq: Create hctx for each present CPU
blk-mq: Include all present CPUs in the default queue mapping
genirq: Avoid unnecessary low level irq function calls
genirq: Set irq masked state when initializing irq_desc
genirq/timings: Add infrastructure for estimating the next interrupt arrival time
genirq/timings: Add infrastructure to track the interrupt timings
genirq/debugfs: Remove pointless NULL pointer check
irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID
irqchip/gic-v3-its: Add ACPI NUMA node mapping
irqchip/gic-v3-its-platform-msi: Make of_device_ids const
irqchip/gic-v3-its: Make of_device_ids const
irqchip/irq-mvebu-icu: Add new driver for Marvell ICU
irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP
dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU
genirq/irqdomain: Remove auto-recursive hierarchy support
irqchip/MSI: Use irq_domain_update_bus_token instead of an open coded access
...
81 lines
1.7 KiB
C
81 lines
1.7 KiB
C
/*
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* CPU <-> hardware queue mapping helpers
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*
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* Copyright (C) 2013-2014 Jens Axboe
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*/
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#include <linux/kernel.h>
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#include <linux/threads.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/cpu.h>
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#include <linux/blk-mq.h>
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#include "blk.h"
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#include "blk-mq.h"
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static int cpu_to_queue_index(unsigned int nr_queues, const int cpu)
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{
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/*
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* Non online CPU will be mapped to queue index 0.
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*/
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if (!cpu_online(cpu))
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return 0;
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return cpu % nr_queues;
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}
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static int get_first_sibling(unsigned int cpu)
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{
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unsigned int ret;
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ret = cpumask_first(topology_sibling_cpumask(cpu));
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if (ret < nr_cpu_ids)
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return ret;
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return cpu;
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}
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int blk_mq_map_queues(struct blk_mq_tag_set *set)
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{
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unsigned int *map = set->mq_map;
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unsigned int nr_queues = set->nr_hw_queues;
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unsigned int cpu, first_sibling;
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for_each_possible_cpu(cpu) {
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/*
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* First do sequential mapping between CPUs and queues.
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* In case we still have CPUs to map, and we have some number of
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* threads per cores then map sibling threads to the same queue for
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* performace optimizations.
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*/
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if (cpu < nr_queues) {
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map[cpu] = cpu_to_queue_index(nr_queues, cpu);
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} else {
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first_sibling = get_first_sibling(cpu);
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if (first_sibling == cpu)
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map[cpu] = cpu_to_queue_index(nr_queues, cpu);
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else
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map[cpu] = map[first_sibling];
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}
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(blk_mq_map_queues);
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/*
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* We have no quick way of doing reverse lookups. This is only used at
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* queue init time, so runtime isn't important.
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*/
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int blk_mq_hw_queue_to_node(unsigned int *mq_map, unsigned int index)
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{
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int i;
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for_each_possible_cpu(i) {
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if (index == mq_map[i])
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return local_memory_node(cpu_to_node(i));
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}
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return NUMA_NO_NODE;
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}
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