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Below you will find an updated version from the original series bunching all patches into one big patch updating broken web addresses that are located in Documentation/* Some of the addresses date as far far back as 1995 etc... so searching became a bit difficult, the best way to deal with these is to use web.archive.org to locate these addresses that are outdated. Now there are also some addresses pointing to .spec files some are located, but some(after searching on the companies site)where still no where to be found. In this case I just changed the address to the company site this way the users can contact the company and they can locate them for the users. Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Thomas Weber <weber@corscience.de> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Cc: Paulo Marques <pmarques@grupopie.com> Cc: Randy Dunlap <rdunlap@xenotime.net> Cc: Michael Neuling <mikey@neuling.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
57 lines
2.2 KiB
Plaintext
57 lines
2.2 KiB
Plaintext
ASoC currently supports the three main Digital Audio Interfaces (DAI) found on
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SoC controllers and portable audio CODECs today, namely AC97, I2S and PCM.
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AC97
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====
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AC97 is a five wire interface commonly found on many PC sound cards. It is
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now also popular in many portable devices. This DAI has a reset line and time
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multiplexes its data on its SDATA_OUT (playback) and SDATA_IN (capture) lines.
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The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the
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frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97
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frame is 21uS long and is divided into 13 time slots.
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The AC97 specification can be found at :-
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http://www.intel.com/p/en_US/business/design
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I2S
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===
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I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
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Rx lines are used for audio transmission, whilst the bit clock (BCLK) and
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left/right clock (LRC) synchronise the link. I2S is flexible in that either the
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controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
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usually varies depending on the sample rate and the master system clock
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(SYSCLK). LRCLK is the same as the sample rate. A few devices support separate
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ADC and DAC LRCLKs, this allows for simultaneous capture and playback at
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different sample rates.
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I2S has several different operating modes:-
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o I2S - MSB is transmitted on the falling edge of the first BCLK after LRC
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transition.
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o Left Justified - MSB is transmitted on transition of LRC.
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o Right Justified - MSB is transmitted sample size BCLKs before LRC
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transition.
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PCM
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===
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PCM is another 4 wire interface, very similar to I2S, which can support a more
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flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
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to synchronise the link whilst the Tx and Rx lines are used to transmit and
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receive the audio data. Bit clock usually varies depending on sample rate
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whilst sync runs at the sample rate. PCM also supports Time Division
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Multiplexing (TDM) in that several devices can use the bus simultaneously (this
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is sometimes referred to as network mode).
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Common PCM operating modes:-
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o Mode A - MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
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o Mode B - MSB is transmitted on rising edge of FRAME/SYNC.
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