Bruce Allan db2932ecf8 e1000e: clear PHY wakeup bit after LCD reset on 82577/82578 ... Performing a dummy read of the PHY Wakeup Control (WUC) register clears the wakeup enable bit set by an PHY reset. If this bit remains set, link problems may occur. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2009-10-26 16:16:18 -07:00
..
82571.c	e1000e: swap max hw supported frame size between 82574 and 82583	2009-10-04 21:08:49 -07:00
defines.h	e1000e: delay after LCD reset and proper checks for PHY configuration done	2009-07-03 20:09:29 -07:00
e1000.h	Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6	2009-06-15 03:02:23 -07:00
es2lan.c	e1000e: add support for 82577/82578 GbE LOM parts	2009-06-03 02:46:34 -07:00
ethtool.c	e1000e: Expose MDI-X status via ethtool change	2009-06-09 05:25:36 -07:00
hw.h	e1000e: disable K1 at 1000Mbps for 82577/82578	2009-07-03 20:09:42 -07:00
ich8lan.c	e1000e: clear PHY wakeup bit after LCD reset on 82577/82578	2009-10-26 16:16:18 -07:00
lib.c	e1000e: disable K1 at 1000Mbps for 82577/82578	2009-07-03 20:09:42 -07:00
Makefile	e1000e: reformat comment blocks, cosmetic changes only	2008-03-28 22:14:56 -04:00
netdev.c	e1000e/igb/ixgbe: Don't report an error if devices don't support AER	2009-10-02 10:04:12 -07:00
param.c	e1000e: enable CRC stripping by default	2009-06-03 02:46:31 -07:00
phy.c	e1000e: delay second read of PHY_STATUS register on failure of first read	2009-07-03 20:09:39 -07:00