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daeb4c0c3b
Most PCI implementations use the standard PCI swizzle function, which handles the well defined behaviour of PCI-to-PCI bridges which can be found on cards (eg, four port ethernet cards.) Rather than having almost every platform specify the standard swizzle function, make this the default when no swizzle function is supplied. Therefore, a swizzle function only needs to be provided when there is something exceptional which needs to be handled. This gets rid of the swizzle initializer from 47 files, and leaves us with just two platforms specifying a swizzle function: ARM Integrator and Chalice CATS. Acked-by: Krzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
/*
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* arch/arm/mach-ixp4xx/miccpt-pci.c
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*
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* MICCPT board-level PCI initialization
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*
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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* Copyright (C) 2006 OMICRON electronics GmbH
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*
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* Author: Michael Jochum <michael.jochum@omicron.at>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#define MAX_DEV 4
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#define IRQ_LINES 4
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/* PCI controller GPIO to IRQ pin mappings */
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#define INTA 1
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#define INTB 2
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#define INTC 3
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#define INTD 4
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void __init miccpt_pci_preinit(void)
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{
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[IRQ_LINES] = {
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IXP4XX_GPIO_IRQ(INTA),
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IXP4XX_GPIO_IRQ(INTB),
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IXP4XX_GPIO_IRQ(INTC),
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IXP4XX_GPIO_IRQ(INTD)
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};
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if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
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return pci_irq_table[(slot + pin - 2) % 4];
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return -1;
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}
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struct hw_pci miccpt_pci __initdata = {
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.nr_controllers = 1,
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.preinit = miccpt_pci_preinit,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = miccpt_map_irq,
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};
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int __init miccpt_pci_init(void)
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{
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if (machine_is_miccpt())
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pci_common_init(&miccpt_pci);
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return 0;
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}
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subsys_initcall(miccpt_pci_init);
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