mirror of
https://github.com/torvalds/linux.git
synced 2024-11-07 20:51:47 +00:00
6fc31d5444
Since the debug macros no longer depend on the machine type information, the machine type lookup can be deferred to setup_arch() in setup.c which simplifies the code somewhat. We also move the __error_a functionality into setup.c for displaying a message when a bad machine ID is passed to the kernel via the LL debug code. We also log this into the kernel ring buffer which makes it possible to retrieve the message via a debugger. Original idea from Grant Likely. Acked-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
91 lines
2.1 KiB
ArmAsm
91 lines
2.1 KiB
ArmAsm
/*
|
|
* linux/arch/arm/kernel/head-nommu.S
|
|
*
|
|
* Copyright (C) 1994-2002 Russell King
|
|
* Copyright (C) 2003-2006 Hyok S. Choi
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* Common kernel startup code (non-paged MM)
|
|
*
|
|
*/
|
|
#include <linux/linkage.h>
|
|
#include <linux/init.h>
|
|
|
|
#include <asm/assembler.h>
|
|
#include <asm/ptrace.h>
|
|
#include <asm/asm-offsets.h>
|
|
#include <asm/thread_info.h>
|
|
#include <asm/system.h>
|
|
|
|
/*
|
|
* Kernel startup entry point.
|
|
* ---------------------------
|
|
*
|
|
* This is normally called from the decompressor code. The requirements
|
|
* are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
|
|
* r1 = machine nr.
|
|
*
|
|
* See linux/arch/arm/tools/mach-types for the complete list of machine
|
|
* numbers for r1.
|
|
*
|
|
*/
|
|
__HEAD
|
|
ENTRY(stext)
|
|
setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
|
|
@ and irqs disabled
|
|
#ifndef CONFIG_CPU_CP15
|
|
ldr r9, =CONFIG_PROCESSOR_ID
|
|
#else
|
|
mrc p15, 0, r9, c0, c0 @ get processor id
|
|
#endif
|
|
bl __lookup_processor_type @ r5=procinfo r9=cpuid
|
|
movs r10, r5 @ invalid processor (r5=0)?
|
|
beq __error_p @ yes, error 'p'
|
|
|
|
adr lr, BSYM(__after_proc_init) @ return (PIC) address
|
|
ARM( add pc, r10, #PROCINFO_INITFUNC )
|
|
THUMB( add r12, r10, #PROCINFO_INITFUNC )
|
|
THUMB( mov pc, r12 )
|
|
ENDPROC(stext)
|
|
|
|
/*
|
|
* Set the Control Register and Read the process ID.
|
|
*/
|
|
__after_proc_init:
|
|
#ifdef CONFIG_CPU_CP15
|
|
/*
|
|
* CP15 system control register value returned in r0 from
|
|
* the CPU init function.
|
|
*/
|
|
#ifdef CONFIG_ALIGNMENT_TRAP
|
|
orr r0, r0, #CR_A
|
|
#else
|
|
bic r0, r0, #CR_A
|
|
#endif
|
|
#ifdef CONFIG_CPU_DCACHE_DISABLE
|
|
bic r0, r0, #CR_C
|
|
#endif
|
|
#ifdef CONFIG_CPU_BPREDICT_DISABLE
|
|
bic r0, r0, #CR_Z
|
|
#endif
|
|
#ifdef CONFIG_CPU_ICACHE_DISABLE
|
|
bic r0, r0, #CR_I
|
|
#endif
|
|
#ifdef CONFIG_CPU_HIGH_VECTOR
|
|
orr r0, r0, #CR_V
|
|
#else
|
|
bic r0, r0, #CR_V
|
|
#endif
|
|
mcr p15, 0, r0, c1, c0, 0 @ write control reg
|
|
#endif /* CONFIG_CPU_CP15 */
|
|
|
|
b __mmap_switched @ clear the BSS and jump
|
|
@ to start_kernel
|
|
ENDPROC(__after_proc_init)
|
|
.ltorg
|
|
|
|
#include "head-common.S"
|