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88f06b76e4
When the kernel is running in secure boot mode, we lock down the kernel to prevent userspace from modifying the running kernel image. Whilst this includes prohibiting access to things like /dev/mem, it must also prevent access by means of configuring driver modules in such a way as to cause a device to access or modify the kernel image. To this end, annotate module_param* statements that refer to hardware configuration and indicate for future reference what type of parameter they specify. The parameter parser in the core sees this information and can skip such parameters with an error message if the kernel is locked down. The module initialisation then runs as normal, but just sees whatever the default values for those parameters is. Note that we do still need to do the module initialisation because some drivers have viable defaults set in case parameters aren't specified and some drivers support automatic configuration (e.g. PNP or PCI) in addition to manually coded parameters. This patch annotates drivers in drivers/scsi/. Suggested-by: Alan Cox <gnomes@lxorguk.ukuu.org.uk> Signed-off-by: David Howells <dhowells@redhat.com> cc: "Juergen E. Fischer" <fischer@norbit.de> cc: "James E.J. Bottomley" <jejb@linux.vnet.ibm.com> cc: "Martin K. Petersen" <martin.petersen@oracle.com> cc: Dario Ballabio <ballabio_dario@emc.com> cc: Finn Thain <fthain@telegraphics.com.au> cc: Michael Schmitz <schmitzmic@gmail.com> cc: Achim Leubner <achim_leubner@adaptec.com> cc: linux-scsi@vger.kernel.org
786 lines
20 KiB
C
786 lines
20 KiB
C
/*
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* Generic Generic NCR5380 driver
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*
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* Copyright 1993, Drew Eckhardt
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* Visionary Computing
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* (Unix and Linux consulting and custom programming)
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* drew@colorado.edu
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* +1 (303) 440-4894
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*
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* NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
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* K.Lentin@cs.monash.edu.au
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*
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* NCR53C400A extensions (c) 1996, Ingmar Baumgart
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* ingmar@gonzo.schwaben.de
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*
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* DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
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* ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
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*
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* Added ISAPNP support for DTC436 adapters,
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* Thomas Sailer, sailer@ife.ee.ethz.ch
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*
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* See Documentation/scsi/g_NCR5380.txt for more info.
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*/
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#include <asm/io.h>
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#include <linux/blkdev.h>
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#include <linux/module.h>
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#include <scsi/scsi_host.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/isa.h>
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#include <linux/pnp.h>
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#include <linux/interrupt.h>
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/* Definitions for the core NCR5380 driver. */
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#define NCR5380_read(reg) \
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ioread8(hostdata->io + hostdata->offset + (reg))
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#define NCR5380_write(reg, value) \
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iowrite8(value, hostdata->io + hostdata->offset + (reg))
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#define NCR5380_implementation_fields \
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int offset; \
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int c400_ctl_status; \
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int c400_blk_cnt; \
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int c400_host_buf; \
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int io_width
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#define NCR5380_dma_xfer_len generic_NCR5380_dma_xfer_len
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#define NCR5380_dma_recv_setup generic_NCR5380_pread
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#define NCR5380_dma_send_setup generic_NCR5380_pwrite
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#define NCR5380_dma_residual NCR5380_dma_residual_none
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#define NCR5380_intr generic_NCR5380_intr
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#define NCR5380_queue_command generic_NCR5380_queue_command
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#define NCR5380_abort generic_NCR5380_abort
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#define NCR5380_bus_reset generic_NCR5380_bus_reset
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#define NCR5380_info generic_NCR5380_info
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#define NCR5380_io_delay(x) udelay(x)
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#include "NCR5380.h"
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#define DRV_MODULE_NAME "g_NCR5380"
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#define NCR53C400_mem_base 0x3880
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#define NCR53C400_host_buffer 0x3900
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#define NCR53C400_region_size 0x3a00
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#define BOARD_NCR5380 0
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#define BOARD_NCR53C400 1
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#define BOARD_NCR53C400A 2
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#define BOARD_DTC3181E 3
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#define BOARD_HP_C2502 4
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#define IRQ_AUTO 254
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#define MAX_CARDS 8
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/* old-style parameters for compatibility */
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static int ncr_irq = -1;
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static int ncr_addr;
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static int ncr_5380;
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static int ncr_53c400;
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static int ncr_53c400a;
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static int dtc_3181e;
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static int hp_c2502;
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module_param_hw(ncr_irq, int, irq, 0);
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module_param_hw(ncr_addr, int, ioport, 0);
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module_param(ncr_5380, int, 0);
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module_param(ncr_53c400, int, 0);
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module_param(ncr_53c400a, int, 0);
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module_param(dtc_3181e, int, 0);
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module_param(hp_c2502, int, 0);
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static int irq[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
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module_param_hw_array(irq, int, irq, NULL, 0);
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MODULE_PARM_DESC(irq, "IRQ number(s) (0=none, 254=auto [default])");
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static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
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module_param_hw_array(base, int, ioport, NULL, 0);
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MODULE_PARM_DESC(base, "base address(es)");
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static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
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module_param_array(card, int, NULL, 0);
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MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
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MODULE_ALIAS("g_NCR5380_mmio");
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MODULE_LICENSE("GPL");
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static void g_NCR5380_trigger_irq(struct Scsi_Host *instance)
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{
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struct NCR5380_hostdata *hostdata = shost_priv(instance);
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/*
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* An interrupt is triggered whenever BSY = false, SEL = true
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* and a bit set in the SELECT_ENABLE_REG is asserted on the
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* SCSI bus.
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*
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* Note that the bus is only driven when the phase control signals
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* (I/O, C/D, and MSG) match those in the TCR.
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*/
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NCR5380_write(TARGET_COMMAND_REG,
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PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
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NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
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NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
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NCR5380_write(INITIATOR_COMMAND_REG,
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ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
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msleep(1);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
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NCR5380_write(SELECT_ENABLE_REG, 0);
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NCR5380_write(TARGET_COMMAND_REG, 0);
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}
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/**
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* g_NCR5380_probe_irq - find the IRQ of a NCR5380 or equivalent
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* @instance: SCSI host instance
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*
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* Autoprobe for the IRQ line used by the card by triggering an IRQ
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* and then looking to see what interrupt actually turned up.
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*/
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static int g_NCR5380_probe_irq(struct Scsi_Host *instance)
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{
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struct NCR5380_hostdata *hostdata = shost_priv(instance);
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int irq_mask, irq;
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NCR5380_read(RESET_PARITY_INTERRUPT_REG);
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irq_mask = probe_irq_on();
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g_NCR5380_trigger_irq(instance);
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irq = probe_irq_off(irq_mask);
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NCR5380_read(RESET_PARITY_INTERRUPT_REG);
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if (irq <= 0)
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return NO_IRQ;
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return irq;
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}
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/*
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* Configure I/O address of 53C400A or DTC436 by writing magic numbers
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* to ports 0x779 and 0x379.
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*/
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static void magic_configure(int idx, u8 irq, u8 magic[])
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{
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u8 cfg = 0;
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outb(magic[0], 0x779);
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outb(magic[1], 0x379);
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outb(magic[2], 0x379);
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outb(magic[3], 0x379);
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outb(magic[4], 0x379);
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if (irq == 9)
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irq = 2;
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if (idx >= 0 && idx <= 7)
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cfg = 0x80 | idx | (irq << 4);
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outb(cfg, 0x379);
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}
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static irqreturn_t legacy_empty_irq_handler(int irq, void *dev_id)
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{
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return IRQ_HANDLED;
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}
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static int legacy_find_free_irq(int *irq_table)
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{
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while (*irq_table != -1) {
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if (!request_irq(*irq_table, legacy_empty_irq_handler,
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IRQF_PROBE_SHARED, "Test IRQ",
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(void *)irq_table)) {
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free_irq(*irq_table, (void *) irq_table);
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return *irq_table;
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}
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irq_table++;
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}
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return -1;
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}
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static unsigned int ncr_53c400a_ports[] = {
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0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
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};
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static unsigned int dtc_3181e_ports[] = {
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0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
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};
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static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */
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0x59, 0xb9, 0xc5, 0xae, 0xa6
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};
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static u8 hp_c2502_magic[] = { /* HP C2502 */
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0x0f, 0x22, 0xf0, 0x20, 0x80
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};
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static int hp_c2502_irqs[] = {
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9, 5, 7, 3, 4, -1
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};
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static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
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struct device *pdev, int base, int irq, int board)
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{
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bool is_pmio = base <= 0xffff;
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int ret;
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int flags = 0;
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unsigned int *ports = NULL;
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u8 *magic = NULL;
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int i;
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int port_idx = -1;
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unsigned long region_size;
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struct Scsi_Host *instance;
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struct NCR5380_hostdata *hostdata;
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u8 __iomem *iomem;
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switch (board) {
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case BOARD_NCR5380:
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flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
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break;
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case BOARD_NCR53C400A:
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ports = ncr_53c400a_ports;
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magic = ncr_53c400a_magic;
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break;
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case BOARD_HP_C2502:
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ports = ncr_53c400a_ports;
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magic = hp_c2502_magic;
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break;
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case BOARD_DTC3181E:
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ports = dtc_3181e_ports;
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magic = ncr_53c400a_magic;
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break;
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}
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if (is_pmio && ports && magic) {
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/* wakeup sequence for the NCR53C400A and DTC3181E */
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/* Disable the adapter and look for a free io port */
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magic_configure(-1, 0, magic);
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region_size = 16;
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if (base)
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for (i = 0; ports[i]; i++) {
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if (base == ports[i]) { /* index found */
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if (!request_region(ports[i],
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region_size,
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"ncr53c80"))
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return -EBUSY;
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break;
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}
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}
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else
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for (i = 0; ports[i]; i++) {
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if (!request_region(ports[i], region_size,
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"ncr53c80"))
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continue;
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if (inb(ports[i]) == 0xff)
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break;
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release_region(ports[i], region_size);
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}
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if (ports[i]) {
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/* At this point we have our region reserved */
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magic_configure(i, 0, magic); /* no IRQ yet */
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base = ports[i];
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outb(0xc0, base + 9);
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if (inb(base + 9) != 0x80) {
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ret = -ENODEV;
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goto out_release;
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}
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port_idx = i;
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} else
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return -EINVAL;
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} else if (is_pmio) {
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/* NCR5380 - no configuration, just grab */
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region_size = 8;
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if (!base || !request_region(base, region_size, "ncr5380"))
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return -EBUSY;
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} else { /* MMIO */
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region_size = NCR53C400_region_size;
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if (!request_mem_region(base, region_size, "ncr5380"))
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return -EBUSY;
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}
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if (is_pmio)
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iomem = ioport_map(base, region_size);
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else
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iomem = ioremap(base, region_size);
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if (!iomem) {
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ret = -ENOMEM;
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goto out_release;
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}
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instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
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if (instance == NULL) {
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ret = -ENOMEM;
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goto out_unmap;
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}
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hostdata = shost_priv(instance);
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hostdata->io = iomem;
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hostdata->region_size = region_size;
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if (is_pmio) {
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hostdata->io_port = base;
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hostdata->io_width = 1; /* 8-bit PDMA by default */
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hostdata->offset = 0;
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/*
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* On NCR53C400 boards, NCR5380 registers are mapped 8 past
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* the base address.
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*/
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switch (board) {
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case BOARD_NCR53C400:
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hostdata->io_port += 8;
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hostdata->c400_ctl_status = 0;
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hostdata->c400_blk_cnt = 1;
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hostdata->c400_host_buf = 4;
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break;
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case BOARD_DTC3181E:
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hostdata->io_width = 2; /* 16-bit PDMA */
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/* fall through */
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case BOARD_NCR53C400A:
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case BOARD_HP_C2502:
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hostdata->c400_ctl_status = 9;
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hostdata->c400_blk_cnt = 10;
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hostdata->c400_host_buf = 8;
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break;
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}
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} else {
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hostdata->base = base;
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hostdata->offset = NCR53C400_mem_base;
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switch (board) {
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case BOARD_NCR53C400:
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hostdata->c400_ctl_status = 0x100;
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hostdata->c400_blk_cnt = 0x101;
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hostdata->c400_host_buf = 0x104;
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break;
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case BOARD_DTC3181E:
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case BOARD_NCR53C400A:
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case BOARD_HP_C2502:
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pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
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ret = -EINVAL;
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goto out_unregister;
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}
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}
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/* Check for vacant slot */
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NCR5380_write(MODE_REG, 0);
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if (NCR5380_read(MODE_REG) != 0) {
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ret = -ENODEV;
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goto out_unregister;
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}
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ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
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if (ret)
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goto out_unregister;
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switch (board) {
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case BOARD_NCR53C400:
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case BOARD_DTC3181E:
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case BOARD_NCR53C400A:
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case BOARD_HP_C2502:
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NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
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}
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NCR5380_maybe_reset_bus(instance);
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/* Compatibility with documented NCR5380 kernel parameters */
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if (irq == 255 || irq == 0)
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irq = NO_IRQ;
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else if (irq == -1)
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irq = IRQ_AUTO;
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if (board == BOARD_HP_C2502) {
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int *irq_table = hp_c2502_irqs;
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int board_irq = -1;
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switch (irq) {
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case NO_IRQ:
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board_irq = 0;
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break;
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case IRQ_AUTO:
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board_irq = legacy_find_free_irq(irq_table);
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break;
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default:
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while (*irq_table != -1)
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if (*irq_table++ == irq)
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board_irq = irq;
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}
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|
|
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if (board_irq <= 0) {
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board_irq = 0;
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irq = NO_IRQ;
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}
|
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magic_configure(port_idx, board_irq, magic);
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}
|
|
|
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if (irq == IRQ_AUTO) {
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instance->irq = g_NCR5380_probe_irq(instance);
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if (instance->irq == NO_IRQ)
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shost_printk(KERN_INFO, instance, "no irq detected\n");
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} else {
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instance->irq = irq;
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if (instance->irq == NO_IRQ)
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shost_printk(KERN_INFO, instance, "no irq provided\n");
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}
|
|
|
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if (instance->irq != NO_IRQ) {
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if (request_irq(instance->irq, generic_NCR5380_intr,
|
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0, "NCR5380", instance)) {
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instance->irq = NO_IRQ;
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shost_printk(KERN_INFO, instance,
|
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"irq %d denied\n", instance->irq);
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} else {
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shost_printk(KERN_INFO, instance,
|
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"irq %d acquired\n", instance->irq);
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}
|
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}
|
|
|
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ret = scsi_add_host(instance, pdev);
|
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if (ret)
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goto out_free_irq;
|
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scsi_scan_host(instance);
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dev_set_drvdata(pdev, instance);
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return 0;
|
|
|
|
out_free_irq:
|
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if (instance->irq != NO_IRQ)
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free_irq(instance->irq, instance);
|
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NCR5380_exit(instance);
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|
out_unregister:
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scsi_host_put(instance);
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out_unmap:
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iounmap(iomem);
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out_release:
|
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if (is_pmio)
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release_region(base, region_size);
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else
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release_mem_region(base, region_size);
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return ret;
|
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}
|
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|
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static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
|
|
{
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struct NCR5380_hostdata *hostdata = shost_priv(instance);
|
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void __iomem *iomem = hostdata->io;
|
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unsigned long io_port = hostdata->io_port;
|
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unsigned long base = hostdata->base;
|
|
unsigned long region_size = hostdata->region_size;
|
|
|
|
scsi_remove_host(instance);
|
|
if (instance->irq != NO_IRQ)
|
|
free_irq(instance->irq, instance);
|
|
NCR5380_exit(instance);
|
|
scsi_host_put(instance);
|
|
iounmap(iomem);
|
|
if (io_port)
|
|
release_region(io_port, region_size);
|
|
else
|
|
release_mem_region(base, region_size);
|
|
}
|
|
|
|
/**
|
|
* generic_NCR5380_pread - pseudo DMA read
|
|
* @hostdata: scsi host private data
|
|
* @dst: buffer to read into
|
|
* @len: buffer length
|
|
*
|
|
* Perform a pseudo DMA mode read from an NCR53C400 or equivalent
|
|
* controller
|
|
*/
|
|
|
|
static inline int generic_NCR5380_pread(struct NCR5380_hostdata *hostdata,
|
|
unsigned char *dst, int len)
|
|
{
|
|
int blocks = len / 128;
|
|
int start = 0;
|
|
|
|
NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
|
|
NCR5380_write(hostdata->c400_blk_cnt, blocks);
|
|
while (1) {
|
|
if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
|
|
break;
|
|
if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
|
|
printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
|
|
return -1;
|
|
}
|
|
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
|
|
; /* FIXME - no timeout */
|
|
|
|
if (hostdata->io_port && hostdata->io_width == 2)
|
|
insw(hostdata->io_port + hostdata->c400_host_buf,
|
|
dst + start, 64);
|
|
else if (hostdata->io_port)
|
|
insb(hostdata->io_port + hostdata->c400_host_buf,
|
|
dst + start, 128);
|
|
else
|
|
memcpy_fromio(dst + start,
|
|
hostdata->io + NCR53C400_host_buffer, 128);
|
|
|
|
start += 128;
|
|
blocks--;
|
|
}
|
|
|
|
if (blocks) {
|
|
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
|
|
; /* FIXME - no timeout */
|
|
|
|
if (hostdata->io_port && hostdata->io_width == 2)
|
|
insw(hostdata->io_port + hostdata->c400_host_buf,
|
|
dst + start, 64);
|
|
else if (hostdata->io_port)
|
|
insb(hostdata->io_port + hostdata->c400_host_buf,
|
|
dst + start, 128);
|
|
else
|
|
memcpy_fromio(dst + start,
|
|
hostdata->io + NCR53C400_host_buffer, 128);
|
|
|
|
start += 128;
|
|
blocks--;
|
|
}
|
|
|
|
if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
|
|
printk("53C400r: no 53C80 gated irq after transfer");
|
|
|
|
/* wait for 53C80 registers to be available */
|
|
while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
|
|
;
|
|
|
|
if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
|
|
printk(KERN_ERR "53C400r: no end dma signal\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* generic_NCR5380_pwrite - pseudo DMA write
|
|
* @hostdata: scsi host private data
|
|
* @dst: buffer to read into
|
|
* @len: buffer length
|
|
*
|
|
* Perform a pseudo DMA mode read from an NCR53C400 or equivalent
|
|
* controller
|
|
*/
|
|
|
|
static inline int generic_NCR5380_pwrite(struct NCR5380_hostdata *hostdata,
|
|
unsigned char *src, int len)
|
|
{
|
|
int blocks = len / 128;
|
|
int start = 0;
|
|
|
|
NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
|
|
NCR5380_write(hostdata->c400_blk_cnt, blocks);
|
|
while (1) {
|
|
if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
|
|
printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
|
|
return -1;
|
|
}
|
|
|
|
if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
|
|
break;
|
|
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
|
|
; // FIXME - timeout
|
|
|
|
if (hostdata->io_port && hostdata->io_width == 2)
|
|
outsw(hostdata->io_port + hostdata->c400_host_buf,
|
|
src + start, 64);
|
|
else if (hostdata->io_port)
|
|
outsb(hostdata->io_port + hostdata->c400_host_buf,
|
|
src + start, 128);
|
|
else
|
|
memcpy_toio(hostdata->io + NCR53C400_host_buffer,
|
|
src + start, 128);
|
|
|
|
start += 128;
|
|
blocks--;
|
|
}
|
|
if (blocks) {
|
|
while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
|
|
; // FIXME - no timeout
|
|
|
|
if (hostdata->io_port && hostdata->io_width == 2)
|
|
outsw(hostdata->io_port + hostdata->c400_host_buf,
|
|
src + start, 64);
|
|
else if (hostdata->io_port)
|
|
outsb(hostdata->io_port + hostdata->c400_host_buf,
|
|
src + start, 128);
|
|
else
|
|
memcpy_toio(hostdata->io + NCR53C400_host_buffer,
|
|
src + start, 128);
|
|
|
|
start += 128;
|
|
blocks--;
|
|
}
|
|
|
|
/* wait for 53C80 registers to be available */
|
|
while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
|
|
udelay(4); /* DTC436 chip hangs without this */
|
|
/* FIXME - no timeout */
|
|
}
|
|
|
|
if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
|
|
printk(KERN_ERR "53C400w: no end dma signal\n");
|
|
}
|
|
|
|
while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
|
|
; // TIMEOUT
|
|
return 0;
|
|
}
|
|
|
|
static int generic_NCR5380_dma_xfer_len(struct NCR5380_hostdata *hostdata,
|
|
struct scsi_cmnd *cmd)
|
|
{
|
|
int transfersize = cmd->transfersize;
|
|
|
|
if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
|
|
return 0;
|
|
|
|
/* Limit transfers to 32K, for xx400 & xx406
|
|
* pseudoDMA that transfers in 128 bytes blocks.
|
|
*/
|
|
if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
|
|
!(cmd->SCp.this_residual % transfersize))
|
|
transfersize = 32 * 1024;
|
|
|
|
/* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
|
|
if (transfersize % 128)
|
|
transfersize = 0;
|
|
|
|
return transfersize;
|
|
}
|
|
|
|
/*
|
|
* Include the NCR5380 core code that we build our driver around
|
|
*/
|
|
|
|
#include "NCR5380.c"
|
|
|
|
static struct scsi_host_template driver_template = {
|
|
.module = THIS_MODULE,
|
|
.proc_name = DRV_MODULE_NAME,
|
|
.name = "Generic NCR5380/NCR53C400 SCSI",
|
|
.info = generic_NCR5380_info,
|
|
.queuecommand = generic_NCR5380_queue_command,
|
|
.eh_abort_handler = generic_NCR5380_abort,
|
|
.eh_bus_reset_handler = generic_NCR5380_bus_reset,
|
|
.can_queue = 16,
|
|
.this_id = 7,
|
|
.sg_tablesize = SG_ALL,
|
|
.cmd_per_lun = 2,
|
|
.use_clustering = DISABLE_CLUSTERING,
|
|
.cmd_size = NCR5380_CMD_SIZE,
|
|
.max_sectors = 128,
|
|
};
|
|
|
|
|
|
static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
|
|
{
|
|
int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
|
|
irq[ndev], card[ndev]);
|
|
if (ret) {
|
|
if (base[ndev])
|
|
printk(KERN_WARNING "Card not found at address 0x%03x\n",
|
|
base[ndev]);
|
|
return 0;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int generic_NCR5380_isa_remove(struct device *pdev,
|
|
unsigned int ndev)
|
|
{
|
|
generic_NCR5380_release_resources(dev_get_drvdata(pdev));
|
|
dev_set_drvdata(pdev, NULL);
|
|
return 0;
|
|
}
|
|
|
|
static struct isa_driver generic_NCR5380_isa_driver = {
|
|
.match = generic_NCR5380_isa_match,
|
|
.remove = generic_NCR5380_isa_remove,
|
|
.driver = {
|
|
.name = DRV_MODULE_NAME
|
|
},
|
|
};
|
|
|
|
#ifdef CONFIG_PNP
|
|
static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
|
|
{ .id = "DTC436e", .driver_data = BOARD_DTC3181E },
|
|
{ .id = "" }
|
|
};
|
|
MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
|
|
|
|
static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
|
|
const struct pnp_device_id *id)
|
|
{
|
|
int base, irq;
|
|
|
|
if (pnp_activate_dev(pdev) < 0)
|
|
return -EBUSY;
|
|
|
|
base = pnp_port_start(pdev, 0);
|
|
irq = pnp_irq(pdev, 0);
|
|
|
|
return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
|
|
id->driver_data);
|
|
}
|
|
|
|
static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
|
|
{
|
|
generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
|
|
pnp_set_drvdata(pdev, NULL);
|
|
}
|
|
|
|
static struct pnp_driver generic_NCR5380_pnp_driver = {
|
|
.name = DRV_MODULE_NAME,
|
|
.id_table = generic_NCR5380_pnp_ids,
|
|
.probe = generic_NCR5380_pnp_probe,
|
|
.remove = generic_NCR5380_pnp_remove,
|
|
};
|
|
#endif /* defined(CONFIG_PNP) */
|
|
|
|
static int pnp_registered, isa_registered;
|
|
|
|
static int __init generic_NCR5380_init(void)
|
|
{
|
|
int ret = 0;
|
|
|
|
/* compatibility with old-style parameters */
|
|
if (irq[0] == -1 && base[0] == 0 && card[0] == -1) {
|
|
irq[0] = ncr_irq;
|
|
base[0] = ncr_addr;
|
|
if (ncr_5380)
|
|
card[0] = BOARD_NCR5380;
|
|
if (ncr_53c400)
|
|
card[0] = BOARD_NCR53C400;
|
|
if (ncr_53c400a)
|
|
card[0] = BOARD_NCR53C400A;
|
|
if (dtc_3181e)
|
|
card[0] = BOARD_DTC3181E;
|
|
if (hp_c2502)
|
|
card[0] = BOARD_HP_C2502;
|
|
}
|
|
|
|
#ifdef CONFIG_PNP
|
|
if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
|
|
pnp_registered = 1;
|
|
#endif
|
|
ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
|
|
if (!ret)
|
|
isa_registered = 1;
|
|
|
|
return (pnp_registered || isa_registered) ? 0 : ret;
|
|
}
|
|
|
|
static void __exit generic_NCR5380_exit(void)
|
|
{
|
|
#ifdef CONFIG_PNP
|
|
if (pnp_registered)
|
|
pnp_unregister_driver(&generic_NCR5380_pnp_driver);
|
|
#endif
|
|
if (isa_registered)
|
|
isa_unregister_driver(&generic_NCR5380_isa_driver);
|
|
}
|
|
|
|
module_init(generic_NCR5380_init);
|
|
module_exit(generic_NCR5380_exit);
|