Dave Jiang d8071323c5 dmaengine: idxd: fix setting up priv mode for dwq ... DSA spec says WQ priv bit is 0 if the Privileged Mode Enable field of the PCI Express PASID capability is 0 and pasid is enabled. Make sure that the WQCFG priv field is set correctly according to usage type. Reject config if setting up kernel WQ type and no support. Also add the correct priv setup for a descriptor. Fixes: 484f910e93 ("dmaengine: idxd: fix wq config registers offset programming") Cc: Ramesh Thomas <ramesh.thomas@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/162939084657.903168.14160019185148244596.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2021-08-29 19:14:20 +05:30
..
bus.c	Bus: Make remove callback return void tag	2021-07-27 19:12:14 +05:30
cdev.c	dmanegine: idxd: add software command status	2021-07-28 17:56:55 +05:30
compat.c	dmaengine: idxd: Fix a possible NULL pointer dereference	2021-08-02 12:35:10 +05:30
device.c	dmaengine: idxd: fix setting up priv mode for dwq	2021-08-29 19:14:20 +05:30
dma.c	dmaengine: idxd: fix setting up priv mode for dwq	2021-08-29 19:14:20 +05:30
idxd.h	dmanegine: idxd: add software command status	2021-07-28 17:56:55 +05:30
init.c	dmaengine: idxd: Set defaults for GRPCFG traffic class	2021-07-28 17:55:40 +05:30
irq.c	dmaengine: idxd: remove interrupt flag for completion list spinlock	2021-08-06 21:50:00 +05:30
Makefile	dmaengine: idxd: move dsa_drv support to compatible mode	2021-07-21 10:09:16 +05:30
perfmon.c	dmaengine: idxd: Add IDXD performance monitor support	2021-04-25 21:46:12 +05:30
perfmon.h	dmaengine: idxd: Add IDXD performance monitor support	2021-04-25 21:46:12 +05:30
registers.h	dmaengine: idxd: Set defaults for GRPCFG traffic class	2021-07-28 17:55:40 +05:30
submit.c	dmaengine: idxd: make submit failure path consistent on desc freeing	2021-08-25 17:00:24 +05:30
sysfs.c	dmaengine: idxd: add capability check for 'block on fault' attribute	2021-08-06 19:23:05 +05:30