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Add ARM CoreLink CCI-550 cache coherent interconnect PMU driver support. The CCI-550 PMU shares all the attributes of CCI-500 PMU, except for an additional master interface (MI-6 - 0xe). CCI-550 requires the same work around as for CCI-500 to write to the PMU counter. Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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| .. | ||
| arm-cci.c | ||
| arm-ccn.c | ||
| brcmstb_gisb.c | ||
| imx-weim.c | ||
| Kconfig | ||
| Makefile | ||
| mips_cdmm.c | ||
| mvebu-mbus.c | ||
| omap_l3_noc.c | ||
| omap_l3_noc.h | ||
| omap_l3_smx.c | ||
| omap_l3_smx.h | ||
| omap-ocp2scp.c | ||
| simple-pm-bus.c | ||
| sunxi-rsb.c | ||
| uniphier-system-bus.c | ||
| vexpress-config.c | ||