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04a6a8eb13
For readability and simplicity, cleanup the riscv_kexec_relocate code: - Re-sort the first 4 `mv` instructions against `riscv_kexec_method()` - Eliminate registers for debugging (s9,s10,s11) and storing const-value (s5,s6) - Replace `jalr` with `jr` for no-link jump I tested this on Qemu virt machine and works as it was. Signed-off-by: Song Shuai <songshuaishuai@tinylab.org> Link: https://lore.kernel.org/r/20230907103304.590739-2-songshuaishuai@tinylab.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
216 lines
4.2 KiB
ArmAsm
216 lines
4.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 FORTH-ICS/CARV
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* Nick Kossifidis <mick@ics.forth.gr>
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*/
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#include <asm/asm.h> /* For RISCV_* and REG_* macros */
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#include <asm/csr.h> /* For CSR_* macros */
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#include <asm/page.h> /* For PAGE_SIZE */
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#include <linux/linkage.h> /* For SYM_* macros */
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.section ".rodata"
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SYM_CODE_START(riscv_kexec_relocate)
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/*
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* s0: Pointer to the current entry
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* s1: (const) Phys address to jump to after relocation
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* s2: (const) Phys address of the FDT image
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* s3: (const) The hartid of the current hart
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* s4: (const) kernel_map.va_pa_offset, used when switching MMU off
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* s5: Pointer to the destination address for the relocation
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* s6: (const) Physical address of the main loop
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*/
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mv s0, a0
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mv s1, a1
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mv s2, a2
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mv s3, a3
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mv s4, a4
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mv s5, zero
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mv s6, zero
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/* Disable / cleanup interrupts */
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csrw CSR_SIE, zero
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csrw CSR_SIP, zero
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/*
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* When we switch SATP.MODE to "Bare" we'll only
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* play with physical addresses. However the first time
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* we try to jump somewhere, the offset on the jump
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* will be relative to pc which will still be on VA. To
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* deal with this we set stvec to the physical address at
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* the start of the loop below so that we jump there in
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* any case.
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*/
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la s6, 1f
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sub s6, s6, s4
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csrw CSR_STVEC, s6
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/*
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* With C-extension, here we get 42 Bytes and the next
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* .align directive would pad zeros here up to 44 Bytes.
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* So manually put a nop here to avoid zeros padding.
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*/
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nop
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/* Process entries in a loop */
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.align 2
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1:
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REG_L t0, 0(s0) /* t0 = *image->entry */
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addi s0, s0, RISCV_SZPTR /* image->entry++ */
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/* IND_DESTINATION entry ? -> save destination address */
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andi t1, t0, 0x1
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beqz t1, 2f
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andi s5, t0, ~0x1
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j 1b
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2:
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/* IND_INDIRECTION entry ? -> update next entry ptr (PA) */
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andi t1, t0, 0x2
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beqz t1, 2f
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andi s0, t0, ~0x2
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csrw CSR_SATP, zero
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jr s6
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2:
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/* IND_DONE entry ? -> jump to done label */
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andi t1, t0, 0x4
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beqz t1, 2f
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j 4f
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2:
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/*
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* IND_SOURCE entry ? -> copy page word by word to the
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* destination address we got from IND_DESTINATION
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*/
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andi t1, t0, 0x8
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beqz t1, 1b /* Unknown entry type, ignore it */
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andi t0, t0, ~0x8
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li t3, (PAGE_SIZE / RISCV_SZPTR) /* i = num words per page */
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3: /* copy loop */
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REG_L t1, (t0) /* t1 = *src_ptr */
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REG_S t1, (s5) /* *dst_ptr = *src_ptr */
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addi t0, t0, RISCV_SZPTR /* stc_ptr++ */
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addi s5, s5, RISCV_SZPTR /* dst_ptr++ */
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addi t3, t3, -0x1 /* i-- */
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beqz t3, 1b /* copy done ? */
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j 3b
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4:
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/* Pass the arguments to the next kernel / Cleanup*/
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mv a0, s3
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mv a1, s2
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mv a2, s1
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/* Cleanup */
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mv a3, zero
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mv a4, zero
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mv a5, zero
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mv a6, zero
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mv a7, zero
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mv s0, zero
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mv s1, zero
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mv s2, zero
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mv s3, zero
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mv s4, zero
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mv s5, zero
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mv s6, zero
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mv s7, zero
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mv s8, zero
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mv s9, zero
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mv s10, zero
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mv s11, zero
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mv t0, zero
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mv t1, zero
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mv t2, zero
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mv t3, zero
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mv t4, zero
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mv t5, zero
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mv t6, zero
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csrw CSR_SEPC, zero
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csrw CSR_SCAUSE, zero
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csrw CSR_SSCRATCH, zero
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/*
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* Make sure the relocated code is visible
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* and jump to the new kernel
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*/
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fence.i
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jr a2
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SYM_CODE_END(riscv_kexec_relocate)
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riscv_kexec_relocate_end:
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/* Used for jumping to crashkernel */
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.section ".text"
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SYM_CODE_START(riscv_kexec_norelocate)
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/*
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* s0: (const) Phys address to jump to
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* s1: (const) Phys address of the FDT image
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* s2: (const) The hartid of the current hart
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*/
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mv s0, a1
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mv s1, a2
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mv s2, a3
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/* Disable / cleanup interrupts */
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csrw CSR_SIE, zero
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csrw CSR_SIP, zero
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/* Pass the arguments to the next kernel / Cleanup*/
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mv a0, s2
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mv a1, s1
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mv a2, s0
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/* Cleanup */
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mv a3, zero
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mv a4, zero
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mv a5, zero
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mv a6, zero
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mv a7, zero
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mv s0, zero
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mv s1, zero
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mv s2, zero
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mv s3, zero
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mv s4, zero
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mv s5, zero
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mv s6, zero
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mv s7, zero
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mv s8, zero
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mv s9, zero
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mv s10, zero
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mv s11, zero
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mv t0, zero
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mv t1, zero
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mv t2, zero
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mv t3, zero
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mv t4, zero
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mv t5, zero
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mv t6, zero
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csrw CSR_SEPC, zero
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csrw CSR_SCAUSE, zero
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csrw CSR_SSCRATCH, zero
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/*
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* Switch to physical addressing
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* This will also trigger a jump to CSR_STVEC
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* which in this case is the address of the new
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* kernel.
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*/
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csrw CSR_STVEC, a2
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csrw CSR_SATP, zero
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SYM_CODE_END(riscv_kexec_norelocate)
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.section ".rodata"
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SYM_DATA(riscv_kexec_relocate_size,
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.long riscv_kexec_relocate_end - riscv_kexec_relocate)
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