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d7057e1de8
The Device Tree boot path now supports everything the ATAG boot can provide, and the two are equivalent. This deletes the ATAG boot path from the Integrator/AP and Integrator/CP platforms to move them on to the future. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
172 lines
3.7 KiB
C
172 lines
3.7 KiB
C
/*
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* linux/arch/arm/mach-integrator/core.c
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*
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* Copyright (C) 2000-2003 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/memblock.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/serial.h>
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#include <linux/io.h>
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#include <linux/stat.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include <mach/cm.h>
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#include <mach/irqs.h>
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#include <asm/mach-types.h>
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#include <asm/mach/time.h>
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#include <asm/pgtable.h>
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#include "common.h"
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static DEFINE_RAW_SPINLOCK(cm_lock);
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/**
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* cm_get - get the value from the CM_CTRL register
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*/
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u32 cm_get(void)
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{
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return readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
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}
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/**
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* cm_control - update the CM_CTRL register.
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* @mask: bits to change
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* @set: bits to set
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*/
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void cm_control(u32 mask, u32 set)
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{
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&cm_lock, flags);
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val = readl(CM_CTRL) & ~mask;
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writel(val | set, CM_CTRL);
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raw_spin_unlock_irqrestore(&cm_lock, flags);
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}
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EXPORT_SYMBOL(cm_control);
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/*
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* We need to stop things allocating the low memory; ideally we need a
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* better implementation of GFP_DMA which does not assume that DMA-able
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* memory starts at zero.
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*/
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void __init integrator_reserve(void)
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{
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memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
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}
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/*
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* To reset, we hit the on-board reset register in the system FPGA
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*/
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void integrator_restart(enum reboot_mode mode, const char *cmd)
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{
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cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
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}
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static u32 integrator_id;
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static ssize_t intcp_get_manf(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%02x\n", integrator_id >> 24);
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}
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static struct device_attribute intcp_manf_attr =
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__ATTR(manufacturer, S_IRUGO, intcp_get_manf, NULL);
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static ssize_t intcp_get_arch(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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const char *arch;
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switch ((integrator_id >> 16) & 0xff) {
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case 0x00:
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arch = "ASB little-endian";
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break;
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case 0x01:
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arch = "AHB little-endian";
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break;
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case 0x03:
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arch = "AHB-Lite system bus, bi-endian";
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break;
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case 0x04:
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arch = "AHB";
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break;
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default:
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arch = "Unknown";
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break;
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}
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return sprintf(buf, "%s\n", arch);
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}
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static struct device_attribute intcp_arch_attr =
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__ATTR(architecture, S_IRUGO, intcp_get_arch, NULL);
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static ssize_t intcp_get_fpga(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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const char *fpga;
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switch ((integrator_id >> 12) & 0xf) {
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case 0x01:
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fpga = "XC4062";
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break;
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case 0x02:
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fpga = "XC4085";
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break;
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case 0x04:
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fpga = "EPM7256AE (Altera PLD)";
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break;
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default:
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fpga = "Unknown";
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break;
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}
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return sprintf(buf, "%s\n", fpga);
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}
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static struct device_attribute intcp_fpga_attr =
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__ATTR(fpga, S_IRUGO, intcp_get_fpga, NULL);
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static ssize_t intcp_get_build(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%02x\n", (integrator_id >> 4) & 0xFF);
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}
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static struct device_attribute intcp_build_attr =
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__ATTR(build, S_IRUGO, intcp_get_build, NULL);
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void integrator_init_sysfs(struct device *parent, u32 id)
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{
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integrator_id = id;
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device_create_file(parent, &intcp_manf_attr);
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device_create_file(parent, &intcp_arch_attr);
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device_create_file(parent, &intcp_fpga_attr);
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device_create_file(parent, &intcp_build_attr);
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}
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