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1fd02f6605
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220430185654.5855-1-Julia.Lawall@inria.fr
573 lines
16 KiB
C
573 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Watchdog support on powerpc systems.
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*
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* Copyright 2017, IBM Corporation.
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*
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* This uses code from arch/sparc/kernel/nmi.c and kernel/watchdog.c
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*/
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#define pr_fmt(fmt) "watchdog: " fmt
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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#include <linux/cpu.h>
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#include <linux/nmi.h>
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#include <linux/module.h>
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#include <linux/export.h>
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#include <linux/kprobes.h>
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#include <linux/hardirq.h>
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#include <linux/reboot.h>
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#include <linux/slab.h>
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#include <linux/kdebug.h>
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#include <linux/sched/debug.h>
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#include <linux/delay.h>
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#include <linux/processor.h>
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#include <linux/smp.h>
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#include <asm/interrupt.h>
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#include <asm/paca.h>
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#include <asm/nmi.h>
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/*
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* The powerpc watchdog ensures that each CPU is able to service timers.
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* The watchdog sets up a simple timer on each CPU to run once per timer
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* period, and updates a per-cpu timestamp and a "pending" cpumask. This is
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* the heartbeat.
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*
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* Then there are two systems to check that the heartbeat is still running.
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* The local soft-NMI, and the SMP checker.
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*
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* The soft-NMI checker can detect lockups on the local CPU. When interrupts
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* are disabled with local_irq_disable(), platforms that use soft-masking
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* can leave hardware interrupts enabled and handle them with a masked
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* interrupt handler. The masked handler can send the timer interrupt to the
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* watchdog's soft_nmi_interrupt(), which appears to Linux as an NMI
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* interrupt, and can be used to detect CPUs stuck with IRQs disabled.
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*
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* The soft-NMI checker will compare the heartbeat timestamp for this CPU
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* with the current time, and take action if the difference exceeds the
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* watchdog threshold.
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*
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* The limitation of the soft-NMI watchdog is that it does not work when
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* interrupts are hard disabled or otherwise not being serviced. This is
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* solved by also having a SMP watchdog where all CPUs check all other
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* CPUs heartbeat.
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*
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* The SMP checker can detect lockups on other CPUs. A global "pending"
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* cpumask is kept, containing all CPUs which enable the watchdog. Each
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* CPU clears their pending bit in their heartbeat timer. When the bitmask
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* becomes empty, the last CPU to clear its pending bit updates a global
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* timestamp and refills the pending bitmask.
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*
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* In the heartbeat timer, if any CPU notices that the global timestamp has
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* not been updated for a period exceeding the watchdog threshold, then it
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* means the CPU(s) with their bit still set in the pending mask have had
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* their heartbeat stop, and action is taken.
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*
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* Some platforms implement true NMI IPIs, which can be used by the SMP
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* watchdog to detect an unresponsive CPU and pull it out of its stuck
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* state with the NMI IPI, to get crash/debug data from it. This way the
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* SMP watchdog can detect hardware interrupts off lockups.
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*/
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static cpumask_t wd_cpus_enabled __read_mostly;
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static u64 wd_panic_timeout_tb __read_mostly; /* timebase ticks until panic */
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static u64 wd_smp_panic_timeout_tb __read_mostly; /* panic other CPUs */
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static u64 wd_timer_period_ms __read_mostly; /* interval between heartbeat */
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static DEFINE_PER_CPU(struct hrtimer, wd_hrtimer);
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static DEFINE_PER_CPU(u64, wd_timer_tb);
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/* SMP checker bits */
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static unsigned long __wd_smp_lock;
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static unsigned long __wd_reporting;
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static unsigned long __wd_nmi_output;
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static cpumask_t wd_smp_cpus_pending;
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static cpumask_t wd_smp_cpus_stuck;
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static u64 wd_smp_last_reset_tb;
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/*
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* Try to take the exclusive watchdog action / NMI IPI / printing lock.
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* wd_smp_lock must be held. If this fails, we should return and wait
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* for the watchdog to kick in again (or another CPU to trigger it).
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*
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* Importantly, if hardlockup_panic is set, wd_try_report failure should
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* not delay the panic, because whichever other CPU is reporting will
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* call panic.
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*/
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static bool wd_try_report(void)
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{
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if (__wd_reporting)
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return false;
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__wd_reporting = 1;
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return true;
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}
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/* End printing after successful wd_try_report. wd_smp_lock not required. */
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static void wd_end_reporting(void)
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{
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smp_mb(); /* End printing "critical section" */
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WARN_ON_ONCE(__wd_reporting == 0);
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WRITE_ONCE(__wd_reporting, 0);
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}
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static inline void wd_smp_lock(unsigned long *flags)
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{
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/*
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* Avoid locking layers if possible.
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* This may be called from low level interrupt handlers at some
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* point in future.
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*/
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raw_local_irq_save(*flags);
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hard_irq_disable(); /* Make it soft-NMI safe */
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while (unlikely(test_and_set_bit_lock(0, &__wd_smp_lock))) {
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raw_local_irq_restore(*flags);
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spin_until_cond(!test_bit(0, &__wd_smp_lock));
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raw_local_irq_save(*flags);
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hard_irq_disable();
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}
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}
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static inline void wd_smp_unlock(unsigned long *flags)
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{
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clear_bit_unlock(0, &__wd_smp_lock);
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raw_local_irq_restore(*flags);
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}
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static void wd_lockup_ipi(struct pt_regs *regs)
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{
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int cpu = raw_smp_processor_id();
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u64 tb = get_tb();
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pr_emerg("CPU %d Hard LOCKUP\n", cpu);
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pr_emerg("CPU %d TB:%lld, last heartbeat TB:%lld (%lldms ago)\n",
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cpu, tb, per_cpu(wd_timer_tb, cpu),
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tb_to_ns(tb - per_cpu(wd_timer_tb, cpu)) / 1000000);
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print_modules();
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print_irqtrace_events(current);
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if (regs)
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show_regs(regs);
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else
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dump_stack();
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/*
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* __wd_nmi_output must be set after we printk from NMI context.
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*
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* printk from NMI context defers printing to the console to irq_work.
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* If that NMI was taken in some code that is hard-locked, then irqs
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* are disabled so irq_work will never fire. That can result in the
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* hard lockup messages being delayed (indefinitely, until something
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* else kicks the console drivers).
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*
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* Setting __wd_nmi_output will cause another CPU to notice and kick
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* the console drivers for us.
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*
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* xchg is not needed here (it could be a smp_mb and store), but xchg
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* gives the memory ordering and atomicity required.
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*/
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xchg(&__wd_nmi_output, 1);
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/* Do not panic from here because that can recurse into NMI IPI layer */
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}
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static bool set_cpu_stuck(int cpu)
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{
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cpumask_set_cpu(cpu, &wd_smp_cpus_stuck);
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cpumask_clear_cpu(cpu, &wd_smp_cpus_pending);
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/*
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* See wd_smp_clear_cpu_pending()
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*/
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smp_mb();
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if (cpumask_empty(&wd_smp_cpus_pending)) {
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wd_smp_last_reset_tb = get_tb();
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cpumask_andnot(&wd_smp_cpus_pending,
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&wd_cpus_enabled,
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&wd_smp_cpus_stuck);
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return true;
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}
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return false;
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}
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static void watchdog_smp_panic(int cpu)
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{
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static cpumask_t wd_smp_cpus_ipi; // protected by reporting
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unsigned long flags;
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u64 tb, last_reset;
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int c;
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wd_smp_lock(&flags);
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/* Double check some things under lock */
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tb = get_tb();
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last_reset = wd_smp_last_reset_tb;
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if ((s64)(tb - last_reset) < (s64)wd_smp_panic_timeout_tb)
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goto out;
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if (cpumask_test_cpu(cpu, &wd_smp_cpus_pending))
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goto out;
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if (!wd_try_report())
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goto out;
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for_each_online_cpu(c) {
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if (!cpumask_test_cpu(c, &wd_smp_cpus_pending))
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continue;
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if (c == cpu)
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continue; // should not happen
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__cpumask_set_cpu(c, &wd_smp_cpus_ipi);
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if (set_cpu_stuck(c))
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break;
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}
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if (cpumask_empty(&wd_smp_cpus_ipi)) {
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wd_end_reporting();
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goto out;
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}
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wd_smp_unlock(&flags);
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pr_emerg("CPU %d detected hard LOCKUP on other CPUs %*pbl\n",
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cpu, cpumask_pr_args(&wd_smp_cpus_ipi));
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pr_emerg("CPU %d TB:%lld, last SMP heartbeat TB:%lld (%lldms ago)\n",
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cpu, tb, last_reset, tb_to_ns(tb - last_reset) / 1000000);
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if (!sysctl_hardlockup_all_cpu_backtrace) {
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/*
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* Try to trigger the stuck CPUs, unless we are going to
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* get a backtrace on all of them anyway.
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*/
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for_each_cpu(c, &wd_smp_cpus_ipi) {
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smp_send_nmi_ipi(c, wd_lockup_ipi, 1000000);
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__cpumask_clear_cpu(c, &wd_smp_cpus_ipi);
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}
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} else {
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trigger_allbutself_cpu_backtrace();
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cpumask_clear(&wd_smp_cpus_ipi);
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}
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if (hardlockup_panic)
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nmi_panic(NULL, "Hard LOCKUP");
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wd_end_reporting();
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return;
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out:
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wd_smp_unlock(&flags);
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}
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static void wd_smp_clear_cpu_pending(int cpu)
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{
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if (!cpumask_test_cpu(cpu, &wd_smp_cpus_pending)) {
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if (unlikely(cpumask_test_cpu(cpu, &wd_smp_cpus_stuck))) {
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struct pt_regs *regs = get_irq_regs();
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unsigned long flags;
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pr_emerg("CPU %d became unstuck TB:%lld\n",
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cpu, get_tb());
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print_irqtrace_events(current);
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if (regs)
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show_regs(regs);
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else
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dump_stack();
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wd_smp_lock(&flags);
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cpumask_clear_cpu(cpu, &wd_smp_cpus_stuck);
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wd_smp_unlock(&flags);
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} else {
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/*
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* The last CPU to clear pending should have reset the
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* watchdog so we generally should not find it empty
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* here if our CPU was clear. However it could happen
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* due to a rare race with another CPU taking the
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* last CPU out of the mask concurrently.
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*
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* We can't add a warning for it. But just in case
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* there is a problem with the watchdog that is causing
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* the mask to not be reset, try to kick it along here.
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*/
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if (unlikely(cpumask_empty(&wd_smp_cpus_pending)))
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goto none_pending;
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}
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return;
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}
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/*
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* All other updates to wd_smp_cpus_pending are performed under
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* wd_smp_lock. All of them are atomic except the case where the
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* mask becomes empty and is reset. This will not happen here because
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* cpu was tested to be in the bitmap (above), and a CPU only clears
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* its own bit. _Except_ in the case where another CPU has detected a
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* hard lockup on our CPU and takes us out of the pending mask. So in
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* normal operation there will be no race here, no problem.
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*
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* In the lockup case, this atomic clear-bit vs a store that refills
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* other bits in the accessed word wll not be a problem. The bit clear
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* is atomic so it will not cause the store to get lost, and the store
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* will never set this bit so it will not overwrite the bit clear. The
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* only way for a stuck CPU to return to the pending bitmap is to
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* become unstuck itself.
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*/
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cpumask_clear_cpu(cpu, &wd_smp_cpus_pending);
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/*
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* Order the store to clear pending with the load(s) to check all
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* words in the pending mask to check they are all empty. This orders
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* with the same barrier on another CPU. This prevents two CPUs
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* clearing the last 2 pending bits, but neither seeing the other's
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* store when checking if the mask is empty, and missing an empty
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* mask, which ends with a false positive.
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*/
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smp_mb();
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if (cpumask_empty(&wd_smp_cpus_pending)) {
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unsigned long flags;
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none_pending:
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/*
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* Double check under lock because more than one CPU could see
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* a clear mask with the lockless check after clearing their
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* pending bits.
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*/
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wd_smp_lock(&flags);
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if (cpumask_empty(&wd_smp_cpus_pending)) {
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wd_smp_last_reset_tb = get_tb();
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cpumask_andnot(&wd_smp_cpus_pending,
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&wd_cpus_enabled,
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&wd_smp_cpus_stuck);
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}
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wd_smp_unlock(&flags);
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}
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}
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static void watchdog_timer_interrupt(int cpu)
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{
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u64 tb = get_tb();
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per_cpu(wd_timer_tb, cpu) = tb;
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wd_smp_clear_cpu_pending(cpu);
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if ((s64)(tb - wd_smp_last_reset_tb) >= (s64)wd_smp_panic_timeout_tb)
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watchdog_smp_panic(cpu);
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if (__wd_nmi_output && xchg(&__wd_nmi_output, 0)) {
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/*
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* Something has called printk from NMI context. It might be
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* stuck, so this this triggers a flush that will get that
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* printk output to the console.
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*
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* See wd_lockup_ipi.
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*/
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printk_trigger_flush();
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}
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}
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DEFINE_INTERRUPT_HANDLER_NMI(soft_nmi_interrupt)
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{
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unsigned long flags;
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int cpu = raw_smp_processor_id();
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u64 tb;
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/* should only arrive from kernel, with irqs disabled */
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WARN_ON_ONCE(!arch_irq_disabled_regs(regs));
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if (!cpumask_test_cpu(cpu, &wd_cpus_enabled))
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return 0;
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__this_cpu_inc(irq_stat.soft_nmi_irqs);
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tb = get_tb();
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if (tb - per_cpu(wd_timer_tb, cpu) >= wd_panic_timeout_tb) {
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/*
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* Taking wd_smp_lock here means it is a soft-NMI lock, which
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* means we can't take any regular or irqsafe spin locks while
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* holding this lock. This is why timers can't printk while
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* holding the lock.
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*/
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wd_smp_lock(&flags);
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if (cpumask_test_cpu(cpu, &wd_smp_cpus_stuck)) {
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wd_smp_unlock(&flags);
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return 0;
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}
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if (!wd_try_report()) {
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wd_smp_unlock(&flags);
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/* Couldn't report, try again in 100ms */
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mtspr(SPRN_DEC, 100 * tb_ticks_per_usec * 1000);
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return 0;
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}
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set_cpu_stuck(cpu);
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wd_smp_unlock(&flags);
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pr_emerg("CPU %d self-detected hard LOCKUP @ %pS\n",
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cpu, (void *)regs->nip);
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pr_emerg("CPU %d TB:%lld, last heartbeat TB:%lld (%lldms ago)\n",
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cpu, tb, per_cpu(wd_timer_tb, cpu),
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tb_to_ns(tb - per_cpu(wd_timer_tb, cpu)) / 1000000);
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print_modules();
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print_irqtrace_events(current);
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show_regs(regs);
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xchg(&__wd_nmi_output, 1); // see wd_lockup_ipi
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if (sysctl_hardlockup_all_cpu_backtrace)
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trigger_allbutself_cpu_backtrace();
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if (hardlockup_panic)
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nmi_panic(regs, "Hard LOCKUP");
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wd_end_reporting();
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}
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/*
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* We are okay to change DEC in soft_nmi_interrupt because the masked
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* handler has marked a DEC as pending, so the timer interrupt will be
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* replayed as soon as local irqs are enabled again.
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*/
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if (wd_panic_timeout_tb < 0x7fffffff)
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mtspr(SPRN_DEC, wd_panic_timeout_tb);
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return 0;
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}
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static enum hrtimer_restart watchdog_timer_fn(struct hrtimer *hrtimer)
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{
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int cpu = smp_processor_id();
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if (!(watchdog_enabled & NMI_WATCHDOG_ENABLED))
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return HRTIMER_NORESTART;
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if (!cpumask_test_cpu(cpu, &watchdog_cpumask))
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return HRTIMER_NORESTART;
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watchdog_timer_interrupt(cpu);
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hrtimer_forward_now(hrtimer, ms_to_ktime(wd_timer_period_ms));
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return HRTIMER_RESTART;
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}
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void arch_touch_nmi_watchdog(void)
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{
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unsigned long ticks = tb_ticks_per_usec * wd_timer_period_ms * 1000;
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int cpu = smp_processor_id();
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u64 tb;
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if (!cpumask_test_cpu(cpu, &watchdog_cpumask))
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return;
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tb = get_tb();
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if (tb - per_cpu(wd_timer_tb, cpu) >= ticks) {
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per_cpu(wd_timer_tb, cpu) = tb;
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wd_smp_clear_cpu_pending(cpu);
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}
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}
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EXPORT_SYMBOL(arch_touch_nmi_watchdog);
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static void start_watchdog(void *arg)
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{
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struct hrtimer *hrtimer = this_cpu_ptr(&wd_hrtimer);
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int cpu = smp_processor_id();
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unsigned long flags;
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if (cpumask_test_cpu(cpu, &wd_cpus_enabled)) {
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WARN_ON(1);
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return;
|
|
}
|
|
|
|
if (!(watchdog_enabled & NMI_WATCHDOG_ENABLED))
|
|
return;
|
|
|
|
if (!cpumask_test_cpu(cpu, &watchdog_cpumask))
|
|
return;
|
|
|
|
wd_smp_lock(&flags);
|
|
cpumask_set_cpu(cpu, &wd_cpus_enabled);
|
|
if (cpumask_weight(&wd_cpus_enabled) == 1) {
|
|
cpumask_set_cpu(cpu, &wd_smp_cpus_pending);
|
|
wd_smp_last_reset_tb = get_tb();
|
|
}
|
|
wd_smp_unlock(&flags);
|
|
|
|
*this_cpu_ptr(&wd_timer_tb) = get_tb();
|
|
|
|
hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
|
hrtimer->function = watchdog_timer_fn;
|
|
hrtimer_start(hrtimer, ms_to_ktime(wd_timer_period_ms),
|
|
HRTIMER_MODE_REL_PINNED);
|
|
}
|
|
|
|
static int start_watchdog_on_cpu(unsigned int cpu)
|
|
{
|
|
return smp_call_function_single(cpu, start_watchdog, NULL, true);
|
|
}
|
|
|
|
static void stop_watchdog(void *arg)
|
|
{
|
|
struct hrtimer *hrtimer = this_cpu_ptr(&wd_hrtimer);
|
|
int cpu = smp_processor_id();
|
|
unsigned long flags;
|
|
|
|
if (!cpumask_test_cpu(cpu, &wd_cpus_enabled))
|
|
return; /* Can happen in CPU unplug case */
|
|
|
|
hrtimer_cancel(hrtimer);
|
|
|
|
wd_smp_lock(&flags);
|
|
cpumask_clear_cpu(cpu, &wd_cpus_enabled);
|
|
wd_smp_unlock(&flags);
|
|
|
|
wd_smp_clear_cpu_pending(cpu);
|
|
}
|
|
|
|
static int stop_watchdog_on_cpu(unsigned int cpu)
|
|
{
|
|
return smp_call_function_single(cpu, stop_watchdog, NULL, true);
|
|
}
|
|
|
|
static void watchdog_calc_timeouts(void)
|
|
{
|
|
wd_panic_timeout_tb = watchdog_thresh * ppc_tb_freq;
|
|
|
|
/* Have the SMP detector trigger a bit later */
|
|
wd_smp_panic_timeout_tb = wd_panic_timeout_tb * 3 / 2;
|
|
|
|
/* 2/5 is the factor that the perf based detector uses */
|
|
wd_timer_period_ms = watchdog_thresh * 1000 * 2 / 5;
|
|
}
|
|
|
|
void watchdog_nmi_stop(void)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_cpu(cpu, &wd_cpus_enabled)
|
|
stop_watchdog_on_cpu(cpu);
|
|
}
|
|
|
|
void watchdog_nmi_start(void)
|
|
{
|
|
int cpu;
|
|
|
|
watchdog_calc_timeouts();
|
|
for_each_cpu_and(cpu, cpu_online_mask, &watchdog_cpumask)
|
|
start_watchdog_on_cpu(cpu);
|
|
}
|
|
|
|
/*
|
|
* Invoked from core watchdog init.
|
|
*/
|
|
int __init watchdog_nmi_probe(void)
|
|
{
|
|
int err;
|
|
|
|
err = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN,
|
|
"powerpc/watchdog:online",
|
|
start_watchdog_on_cpu,
|
|
stop_watchdog_on_cpu);
|
|
if (err < 0) {
|
|
pr_warn("could not be initialized");
|
|
return err;
|
|
}
|
|
return 0;
|
|
}
|