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7bb7e9b1a4
Some phys for the chipidea controller are controlled via the ULPI viewport. Add support for the ULPI bus so that these sorts of phys can be probed and read/written automatically without having to duplicate the viewport logic in each phy driver. Acked-by: Peter Chen <peter.chen@nxp.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Peter Chen <peter.chen@nxp.com>
114 lines
2.6 KiB
C
114 lines
2.6 KiB
C
/*
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* Copyright (c) 2016 Linaro Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/device.h>
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#include <linux/usb/chipidea.h>
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#include <linux/ulpi/interface.h>
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#include "ci.h"
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#define ULPI_WAKEUP BIT(31)
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#define ULPI_RUN BIT(30)
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#define ULPI_WRITE BIT(29)
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#define ULPI_SYNC_STATE BIT(27)
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#define ULPI_ADDR(n) ((n) << 16)
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#define ULPI_DATA(n) (n)
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static int ci_ulpi_wait(struct ci_hdrc *ci, u32 mask)
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{
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unsigned long usec = 10000;
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while (usec--) {
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if (!hw_read(ci, OP_ULPI_VIEWPORT, mask))
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return 0;
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udelay(1);
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}
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return -ETIMEDOUT;
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}
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static int ci_ulpi_read(struct device *dev, u8 addr)
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{
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struct ci_hdrc *ci = dev_get_drvdata(dev);
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int ret;
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hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
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ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
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if (ret)
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return ret;
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hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_RUN | ULPI_ADDR(addr));
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ret = ci_ulpi_wait(ci, ULPI_RUN);
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if (ret)
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return ret;
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return hw_read(ci, OP_ULPI_VIEWPORT, GENMASK(15, 8)) >> 8;
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}
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static int ci_ulpi_write(struct device *dev, u8 addr, u8 val)
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{
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struct ci_hdrc *ci = dev_get_drvdata(dev);
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int ret;
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hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
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ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
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if (ret)
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return ret;
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hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff,
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ULPI_RUN | ULPI_WRITE | ULPI_ADDR(addr) | val);
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return ci_ulpi_wait(ci, ULPI_RUN);
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}
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int ci_ulpi_init(struct ci_hdrc *ci)
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{
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if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI)
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return 0;
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/*
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* Set PORTSC correctly so we can read/write ULPI registers for
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* identification purposes
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*/
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hw_phymode_configure(ci);
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ci->ulpi_ops.read = ci_ulpi_read;
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ci->ulpi_ops.write = ci_ulpi_write;
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ci->ulpi = ulpi_register_interface(ci->dev, &ci->ulpi_ops);
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if (IS_ERR(ci->ulpi))
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dev_err(ci->dev, "failed to register ULPI interface");
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return PTR_ERR_OR_ZERO(ci->ulpi);
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}
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void ci_ulpi_exit(struct ci_hdrc *ci)
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{
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if (ci->ulpi) {
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ulpi_unregister_interface(ci->ulpi);
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ci->ulpi = NULL;
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}
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}
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int ci_ulpi_resume(struct ci_hdrc *ci)
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{
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int cnt = 100000;
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while (cnt-- > 0) {
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if (hw_read(ci, OP_ULPI_VIEWPORT, ULPI_SYNC_STATE))
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return 0;
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udelay(1);
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}
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return -ETIMEDOUT;
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}
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