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Add the PCIE_RESET_CONFIG_DEVICE_WAIT_MS macro to define the minimum waiting time between exit from a conventional reset and sending the first configuration request to the device. As described in PCIe r6.0, sec 6.6.1 <Conventional Reset>, there are two different use cases of the value: - "With a Downstream Port that does not support Link speeds greater than 5.0 GT/s, software must wait a minimum of 100 ms following exit from a Conventional Reset before sending a Configuration Request to the device immediately below that Port." - "With a Downstream Port that supports Link speeds greater than 5.0 GT/s, software must wait a minimum of 100 ms after Link training completes before sending a Configuration Request to the device immediately below that Port." [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20240328091835.14797-21-minda.chen@starfivetech.com Signed-off-by: Kevin Xie <kevin.xie@starfivetech.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mason Huo <mason.huo@starfivetech.com> |
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.. | ||
controller | ||
endpoint | ||
hotplug | ||
msi | ||
pcie | ||
switch | ||
access.c | ||
ats.c | ||
bus.c | ||
devres.c | ||
doe.c | ||
ecam.c | ||
host-bridge.c | ||
iomap.c | ||
iov.c | ||
irq.c | ||
Kconfig | ||
Makefile | ||
mmap.c | ||
of_property.c | ||
of.c | ||
p2pdma.c | ||
pci-acpi.c | ||
pci-bridge-emul.c | ||
pci-bridge-emul.h | ||
pci-driver.c | ||
pci-label.c | ||
pci-mid.c | ||
pci-pf-stub.c | ||
pci-stub.c | ||
pci-sysfs.c | ||
pci.c | ||
pci.h | ||
probe.c | ||
proc.c | ||
quirks.c | ||
remove.c | ||
rom.c | ||
search.c | ||
setup-bus.c | ||
setup-res.c | ||
slot.c | ||
syscall.c | ||
vc.c | ||
vgaarb.c | ||
vpd.c | ||
xen-pcifront.c |