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30574f0db1
Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
240 lines
7.5 KiB
C
240 lines
7.5 KiB
C
/*
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* pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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* Copyright (c) 2012 Linaro Ltd
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* http://www.linaro.org
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*
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* Author: Thomas Abraham <thomas.ab@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __PINCTRL_SAMSUNG_H
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#define __PINCTRL_SAMSUNG_H
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/machine.h>
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/* register offsets within a pin bank */
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#define DAT_REG 0x4
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#define PUD_REG 0x8
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#define DRV_REG 0xC
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#define CONPDN_REG 0x10
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#define PUDPDN_REG 0x14
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/* pinmux function number for pin as gpio output line */
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#define FUNC_OUTPUT 0x1
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/**
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* enum pincfg_type - possible pin configuration types supported.
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* @PINCFG_TYPE_PUD: Pull up/down configuration.
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* @PINCFG_TYPE_DRV: Drive strength configuration.
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* @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
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* @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode.
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*/
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enum pincfg_type {
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PINCFG_TYPE_PUD,
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PINCFG_TYPE_DRV,
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PINCFG_TYPE_CON_PDN,
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PINCFG_TYPE_PUD_PDN,
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};
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/*
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* pin configuration (pull up/down and drive strength) type and its value are
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* packed together into a 16-bits. The upper 8-bits represent the configuration
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* type and the lower 8-bits hold the value of the configuration type.
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*/
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#define PINCFG_TYPE_MASK 0xFF
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#define PINCFG_VALUE_SHIFT 8
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#define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT)
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#define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type)
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#define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK)
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#define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \
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PINCFG_VALUE_SHIFT)
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/**
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* enum eint_type - possible external interrupt types.
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* @EINT_TYPE_NONE: bank does not support external interrupts
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* @EINT_TYPE_GPIO: bank supportes external gpio interrupts
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* @EINT_TYPE_WKUP: bank supportes external wakeup interrupts
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*
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* Samsung GPIO controller groups all the available pins into banks. The pins
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* in a pin bank can support external gpio interrupts or external wakeup
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* interrupts or no interrupts at all. From a software perspective, the only
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* difference between external gpio and external wakeup interrupts is that
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* the wakeup interrupts can additionally wakeup the system if it is in
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* suspended state.
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*/
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enum eint_type {
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EINT_TYPE_NONE,
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EINT_TYPE_GPIO,
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EINT_TYPE_WKUP,
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};
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/* maximum length of a pin in pin descriptor (example: "gpa0-0") */
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#define PIN_NAME_LENGTH 10
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#define PIN_GROUP(n, p, f) \
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{ \
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.name = n, \
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.pins = p, \
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.num_pins = ARRAY_SIZE(p), \
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.func = f \
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}
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#define PMX_FUNC(n, g) \
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{ \
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.name = n, \
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.groups = g, \
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.num_groups = ARRAY_SIZE(g), \
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}
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struct samsung_pinctrl_drv_data;
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/**
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* struct samsung_pin_bank: represent a controller pin-bank.
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* @reg_offset: starting offset of the pin-bank registers.
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* @pin_base: starting pin number of the bank.
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* @nr_pins: number of pins included in this bank.
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* @func_width: width of the function selector bit field.
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* @pud_width: width of the pin pull up/down selector bit field.
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* @drv_width: width of the pin driver strength selector bit field.
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* @conpdn_width: width of the sleep mode function selector bin field.
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* @pudpdn_width: width of the sleep mode pull up/down selector bit field.
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* @eint_type: type of the external interrupt supported by the bank.
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* @irq_base: starting controller local irq number of the bank.
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* @name: name to be prefixed for each pin in this pin bank.
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*/
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struct samsung_pin_bank {
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u32 pctl_offset;
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u32 pin_base;
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u8 nr_pins;
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u8 func_width;
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u8 pud_width;
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u8 drv_width;
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u8 conpdn_width;
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u8 pudpdn_width;
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enum eint_type eint_type;
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u32 irq_base;
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char *name;
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};
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/**
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* struct samsung_pin_ctrl: represent a pin controller.
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* @pin_banks: list of pin banks included in this controller.
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* @nr_banks: number of pin banks.
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* @base: starting system wide pin number.
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* @nr_pins: number of pins supported by the controller.
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* @nr_gint: number of external gpio interrupts supported.
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* @nr_wint: number of external wakeup interrupts supported.
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* @geint_con: offset of the ext-gpio controller registers.
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* @geint_mask: offset of the ext-gpio interrupt mask registers.
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* @geint_pend: offset of the ext-gpio interrupt pending registers.
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* @weint_con: offset of the ext-wakeup controller registers.
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* @weint_mask: offset of the ext-wakeup interrupt mask registers.
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* @weint_pend: offset of the ext-wakeup interrupt pending registers.
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* @svc: offset of the interrupt service register.
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* @eint_gpio_init: platform specific callback to setup the external gpio
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* interrupts for the controller.
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* @eint_wkup_init: platform specific callback to setup the external wakeup
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* interrupts for the controller.
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* @label: for debug information.
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*/
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struct samsung_pin_ctrl {
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struct samsung_pin_bank *pin_banks;
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u32 nr_banks;
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u32 base;
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u32 nr_pins;
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u32 nr_gint;
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u32 nr_wint;
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u32 geint_con;
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u32 geint_mask;
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u32 geint_pend;
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u32 weint_con;
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u32 weint_mask;
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u32 weint_pend;
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u32 svc;
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int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
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int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
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char *label;
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};
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/**
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* struct samsung_pinctrl_drv_data: wrapper for holding driver data together.
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* @virt_base: register base address of the controller.
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* @dev: device instance representing the controller.
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* @irq: interrpt number used by the controller to notify gpio interrupts.
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* @ctrl: pin controller instance managed by the driver.
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* @pctl: pin controller descriptor registered with the pinctrl subsystem.
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* @pctl_dev: cookie representing pinctrl device instance.
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* @pin_groups: list of pin groups available to the driver.
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* @nr_groups: number of such pin groups.
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* @pmx_functions: list of pin functions available to the driver.
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* @nr_function: number of such pin functions.
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* @gc: gpio_chip instance registered with gpiolib.
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* @grange: linux gpio pin range supported by this controller.
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*/
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struct samsung_pinctrl_drv_data {
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void __iomem *virt_base;
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struct device *dev;
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int irq;
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struct samsung_pin_ctrl *ctrl;
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struct pinctrl_desc pctl;
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struct pinctrl_dev *pctl_dev;
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const struct samsung_pin_group *pin_groups;
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unsigned int nr_groups;
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const struct samsung_pmx_func *pmx_functions;
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unsigned int nr_functions;
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struct irq_domain *gpio_irqd;
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struct irq_domain *wkup_irqd;
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struct gpio_chip *gc;
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struct pinctrl_gpio_range grange;
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};
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/**
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* struct samsung_pin_group: represent group of pins of a pinmux function.
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* @name: name of the pin group, used to lookup the group.
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* @pins: the pins included in this group.
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* @num_pins: number of pins included in this group.
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* @func: the function number to be programmed when selected.
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*/
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struct samsung_pin_group {
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const char *name;
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const unsigned int *pins;
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u8 num_pins;
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u8 func;
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};
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/**
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* struct samsung_pmx_func: represent a pin function.
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* @name: name of the pin function, used to lookup the function.
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* @groups: one or more names of pin groups that provide this function.
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* @num_groups: number of groups included in @groups.
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*/
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struct samsung_pmx_func {
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const char *name;
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const char **groups;
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u8 num_groups;
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};
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/* list of all exported SoC specific data */
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extern struct samsung_pin_ctrl exynos4210_pin_ctrl[];
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#endif /* __PINCTRL_SAMSUNG_H */
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