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712610725c
There is no point in having seven architectures implementing the same empty stub. Provide a weak function in the init code and remove the stubs. This also allows to utilize the function on UP which is required to sanitize the per CPU handling on X86 UP. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240304005104.567671691@linutronix.de
316 lines
6.0 KiB
C
316 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/percpu.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/irq.h>
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#include <linux/irq_work.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/seq_file.h>
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#include <linux/sched/task_stack.h>
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#include <linux/sched/mm.h>
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#include <linux/sched/hotplug.h>
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#include <asm/irq.h>
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#include <asm/traps.h>
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#include <asm/sections.h>
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#include <asm/mmu_context.h>
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#ifdef CONFIG_CPU_HAS_FPU
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#include <abi/fpu.h>
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#endif
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enum ipi_message_type {
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IPI_EMPTY,
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_IRQ_WORK,
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IPI_MAX
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};
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struct ipi_data_struct {
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unsigned long bits ____cacheline_aligned;
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unsigned long stats[IPI_MAX] ____cacheline_aligned;
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};
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static DEFINE_PER_CPU(struct ipi_data_struct, ipi_data);
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static irqreturn_t handle_ipi(int irq, void *dev)
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{
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unsigned long *stats = this_cpu_ptr(&ipi_data)->stats;
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while (true) {
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unsigned long ops;
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ops = xchg(&this_cpu_ptr(&ipi_data)->bits, 0);
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if (ops == 0)
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return IRQ_HANDLED;
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if (ops & (1 << IPI_RESCHEDULE)) {
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stats[IPI_RESCHEDULE]++;
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scheduler_ipi();
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}
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if (ops & (1 << IPI_CALL_FUNC)) {
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stats[IPI_CALL_FUNC]++;
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generic_smp_call_function_interrupt();
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}
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if (ops & (1 << IPI_IRQ_WORK)) {
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stats[IPI_IRQ_WORK]++;
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irq_work_run();
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}
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BUG_ON((ops >> IPI_MAX) != 0);
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}
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return IRQ_HANDLED;
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}
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static void (*send_arch_ipi)(const struct cpumask *mask);
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static int ipi_irq;
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void __init set_send_ipi(void (*func)(const struct cpumask *mask), int irq)
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{
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if (send_arch_ipi)
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return;
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send_arch_ipi = func;
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ipi_irq = irq;
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}
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static void
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send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation)
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{
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int i;
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for_each_cpu(i, to_whom)
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set_bit(operation, &per_cpu_ptr(&ipi_data, i)->bits);
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smp_mb();
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send_arch_ipi(to_whom);
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}
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static const char * const ipi_names[] = {
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[IPI_EMPTY] = "Empty interrupts",
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[IPI_RESCHEDULE] = "Rescheduling interrupts",
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[IPI_CALL_FUNC] = "Function call interrupts",
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[IPI_IRQ_WORK] = "Irq work interrupts",
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};
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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unsigned int cpu, i;
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for (i = 0; i < IPI_MAX; i++) {
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seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
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prec >= 4 ? " " : "");
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for_each_online_cpu(cpu)
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seq_printf(p, "%10lu ",
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per_cpu_ptr(&ipi_data, cpu)->stats[i]);
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seq_printf(p, " %s\n", ipi_names[i]);
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}
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return 0;
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}
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void arch_send_call_function_ipi_mask(struct cpumask *mask)
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{
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send_ipi_message(mask, IPI_CALL_FUNC);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
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}
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static void ipi_stop(void *unused)
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{
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while (1);
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}
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void smp_send_stop(void)
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{
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on_each_cpu(ipi_stop, NULL, 1);
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}
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void arch_smp_send_reschedule(int cpu)
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{
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send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
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}
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#ifdef CONFIG_IRQ_WORK
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void arch_irq_work_raise(void)
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{
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send_ipi_message(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
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}
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#endif
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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}
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static int ipi_dummy_dev;
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void __init setup_smp_ipi(void)
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{
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int rc;
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if (ipi_irq == 0)
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return;
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rc = request_percpu_irq(ipi_irq, handle_ipi, "IPI Interrupt",
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&ipi_dummy_dev);
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if (rc)
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panic("%s IRQ request failed\n", __func__);
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enable_percpu_irq(ipi_irq, 0);
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}
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void __init setup_smp(void)
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{
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struct device_node *node = NULL;
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unsigned int cpu;
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for_each_of_cpu_node(node) {
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if (!of_device_is_available(node))
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continue;
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cpu = of_get_cpu_hwid(node, 0);
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if (cpu >= NR_CPUS)
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continue;
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set_cpu_possible(cpu, true);
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set_cpu_present(cpu, true);
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}
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}
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extern void _start_smp_secondary(void);
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volatile unsigned int secondary_hint;
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volatile unsigned int secondary_hint2;
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volatile unsigned int secondary_ccr;
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volatile unsigned int secondary_stack;
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volatile unsigned int secondary_msa1;
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volatile unsigned int secondary_pgd;
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int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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unsigned long mask = 1 << cpu;
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secondary_stack =
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(unsigned int) task_stack_page(tidle) + THREAD_SIZE - 8;
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secondary_hint = mfcr("cr31");
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secondary_hint2 = mfcr("cr<21, 1>");
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secondary_ccr = mfcr("cr18");
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secondary_msa1 = read_mmu_msa1();
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secondary_pgd = mfcr("cr<29, 15>");
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/*
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* Because other CPUs are in reset status, we must flush data
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* from cache to out and secondary CPUs use them in
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* csky_start_secondary(void)
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*/
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mtcr("cr17", 0x22);
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if (mask & mfcr("cr<29, 0>")) {
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send_arch_ipi(cpumask_of(cpu));
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} else {
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/* Enable cpu in SMP reset ctrl reg */
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mask |= mfcr("cr<29, 0>");
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mtcr("cr<29, 0>", mask);
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}
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/* Wait for the cpu online */
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while (!cpu_online(cpu));
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secondary_stack = 0;
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return 0;
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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}
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void csky_start_secondary(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu = smp_processor_id();
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mtcr("cr31", secondary_hint);
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mtcr("cr<21, 1>", secondary_hint2);
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mtcr("cr18", secondary_ccr);
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mtcr("vbr", vec_base);
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flush_tlb_all();
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write_mmu_pagemask(0);
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#ifdef CONFIG_CPU_HAS_FPU
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init_fpu();
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#endif
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enable_percpu_irq(ipi_irq, 0);
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mmget(mm);
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mmgrab(mm);
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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notify_cpu_starting(cpu);
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set_cpu_online(cpu, true);
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pr_info("CPU%u Online: %s...\n", cpu, __func__);
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local_irq_enable();
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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int __cpu_disable(void)
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{
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unsigned int cpu = smp_processor_id();
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set_cpu_online(cpu, false);
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irq_migrate_all_off_this_cpu();
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clear_tasks_mm_cpumask(cpu);
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return 0;
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}
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void arch_cpuhp_cleanup_dead_cpu(unsigned int cpu)
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{
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pr_notice("CPU%u: shutdown\n", cpu);
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}
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void __noreturn arch_cpu_idle_dead(void)
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{
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idle_task_exit();
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cpuhp_ap_report_dead();
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while (!secondary_stack)
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arch_cpu_idle();
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raw_local_irq_disable();
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asm volatile(
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"mov sp, %0\n"
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"mov r8, %0\n"
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"jmpi csky_start_secondary"
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:
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: "r" (secondary_stack));
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BUG();
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}
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#endif
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