Gregory CLEMENT d4b803c559 mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor ... According to erratum 'FE-2946959' both SDR50 and DDR50 modes require specific clock adjustments in SDIO3 Configuration register. However, this register was not part of the device tree binding. Even if the binding can (and will) be extended we still need handling the case where this register was not available. In this case we use the SDHCI_QUIRK_MISSING_CAPS quirk remove them from the capabilities. This commit is based on the work done by Marcin Wojtas<mw@semihalf.com> Fixes: 5491ce3f79 ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller") Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>		2015-01-29 13:07:41 +01:00
..
card	mmc: block: Remove unnecessary temporary variable	2015-01-28 12:32:17 +01:00
core	mmc: Resolve BKOPS compatability issue	2015-01-29 11:15:12 +01:00
host	mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor	2015-01-29 13:07:41 +01:00
Kconfig	mmc: explicitly mention SDIO support in Kconfig	2008-10-12 11:04:36 +02:00
Makefile	mmc: sdhci-pci: add platform data	2012-01-11 23:58:47 -05:00