mirror of
https://github.com/torvalds/linux.git
synced 2024-11-29 15:41:36 +00:00
cc97ab235f
MIPS has up until now had 3 different ways for a task's floating point
context to be initialized:
- If the task's first use of FP involves it gaining ownership of an
FPU then _init_fpu() is used to initialize the FPU's registers such
that they all contain ~0, and the FPU registers will be stored to
struct thread_info later (eg. when context switching).
- If the task first uses FP on a CPU without an associated FPU then
fpu_emulator_init_fpu() initializes the task's floating point
register state in struct thread_info such that all floating point
register contain the bit pattern 0x7ff800007ff80000, different to
the _init_fpu() behaviour.
- If a task's floating point context is first accessed via ptrace then
init_fp_ctx() initializes the floating point register state in
struct thread_info to ~0, giving equivalent state to _init_fpu().
The _init_fpu() path has 2 separate implementations - one for r2k/r3k
style systems & one for r4k style systems. The _init_fpu() path also
requires that we be careful to clear & restore the value of the
Config5.FRE bit on modern systems in order to avoid inadvertently
triggering floating point exceptions.
None of this code is in a performance critical hot path - it runs only
the first time a task uses floating point. As such it doesn't seem to
warrant the complications of maintaining the _init_fpu() path.
Remove _init_fpu() & fpu_emulator_init_fpu(), instead using
init_fp_ctx() consistently to initialize floating point register state
in struct thread_info. Upon a task's first use of floating point this
will typically mean that we initialize state in memory & then load it
into FPU registers using _restore_fp() just as we would on a context
switch. For other paths such as __compute_return_epc_for_insn() or
mipsr2_decoder() this results in a significant simplification of the
work to be done.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21002/
Cc: linux-mips@linux-mips.org
131 lines
2.8 KiB
ArmAsm
131 lines
2.8 KiB
ArmAsm
/*
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
* for more details.
|
|
*
|
|
* Copyright (C) 1996, 1998 by Ralf Baechle
|
|
*
|
|
* Multi-arch abstraction and asm macros for easier reading:
|
|
* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
|
|
*
|
|
* Further modifications to make this work:
|
|
* Copyright (c) 1998 Harald Koerfgen
|
|
*/
|
|
#include <asm/asm.h>
|
|
#include <asm/asmmacro.h>
|
|
#include <asm/errno.h>
|
|
#include <asm/export.h>
|
|
#include <asm/fpregdef.h>
|
|
#include <asm/mipsregs.h>
|
|
#include <asm/asm-offsets.h>
|
|
#include <asm/regdef.h>
|
|
|
|
#define EX(a,b) \
|
|
9: a,##b; \
|
|
.section __ex_table,"a"; \
|
|
PTR 9b,fault; \
|
|
.previous
|
|
|
|
#define EX2(a,b) \
|
|
9: a,##b; \
|
|
.section __ex_table,"a"; \
|
|
PTR 9b,bad_stack; \
|
|
PTR 9b+4,bad_stack; \
|
|
.previous
|
|
|
|
.set mips1
|
|
|
|
/*
|
|
* Save a thread's fp context.
|
|
*/
|
|
LEAF(_save_fp)
|
|
EXPORT_SYMBOL(_save_fp)
|
|
fpu_save_single a0, t1 # clobbers t1
|
|
jr ra
|
|
END(_save_fp)
|
|
|
|
/*
|
|
* Restore a thread's fp context.
|
|
*/
|
|
LEAF(_restore_fp)
|
|
fpu_restore_single a0, t1 # clobbers t1
|
|
jr ra
|
|
END(_restore_fp)
|
|
|
|
.set noreorder
|
|
|
|
/**
|
|
* _save_fp_context() - save FP context from the FPU
|
|
* @a0 - pointer to fpregs field of sigcontext
|
|
* @a1 - pointer to fpc_csr field of sigcontext
|
|
*
|
|
* Save FP context, including the 32 FP data registers and the FP
|
|
* control & status register, from the FPU to signal context.
|
|
*/
|
|
LEAF(_save_fp_context)
|
|
.set push
|
|
SET_HARDFLOAT
|
|
li v0, 0 # assume success
|
|
cfc1 t1, fcr31
|
|
EX2(s.d $f0, 0(a0))
|
|
EX2(s.d $f2, 16(a0))
|
|
EX2(s.d $f4, 32(a0))
|
|
EX2(s.d $f6, 48(a0))
|
|
EX2(s.d $f8, 64(a0))
|
|
EX2(s.d $f10, 80(a0))
|
|
EX2(s.d $f12, 96(a0))
|
|
EX2(s.d $f14, 112(a0))
|
|
EX2(s.d $f16, 128(a0))
|
|
EX2(s.d $f18, 144(a0))
|
|
EX2(s.d $f20, 160(a0))
|
|
EX2(s.d $f22, 176(a0))
|
|
EX2(s.d $f24, 192(a0))
|
|
EX2(s.d $f26, 208(a0))
|
|
EX2(s.d $f28, 224(a0))
|
|
EX2(s.d $f30, 240(a0))
|
|
jr ra
|
|
EX(sw t1, (a1))
|
|
.set pop
|
|
END(_save_fp_context)
|
|
|
|
/**
|
|
* _restore_fp_context() - restore FP context to the FPU
|
|
* @a0 - pointer to fpregs field of sigcontext
|
|
* @a1 - pointer to fpc_csr field of sigcontext
|
|
*
|
|
* Restore FP context, including the 32 FP data registers and the FP
|
|
* control & status register, from signal context to the FPU.
|
|
*/
|
|
LEAF(_restore_fp_context)
|
|
.set push
|
|
SET_HARDFLOAT
|
|
li v0, 0 # assume success
|
|
EX(lw t0, (a1))
|
|
EX2(l.d $f0, 0(a0))
|
|
EX2(l.d $f2, 16(a0))
|
|
EX2(l.d $f4, 32(a0))
|
|
EX2(l.d $f6, 48(a0))
|
|
EX2(l.d $f8, 64(a0))
|
|
EX2(l.d $f10, 80(a0))
|
|
EX2(l.d $f12, 96(a0))
|
|
EX2(l.d $f14, 112(a0))
|
|
EX2(l.d $f16, 128(a0))
|
|
EX2(l.d $f18, 144(a0))
|
|
EX2(l.d $f20, 160(a0))
|
|
EX2(l.d $f22, 176(a0))
|
|
EX2(l.d $f24, 192(a0))
|
|
EX2(l.d $f26, 208(a0))
|
|
EX2(l.d $f28, 224(a0))
|
|
EX2(l.d $f30, 240(a0))
|
|
jr ra
|
|
ctc1 t0, fcr31
|
|
.set pop
|
|
END(_restore_fp_context)
|
|
.set reorder
|
|
|
|
.type fault, @function
|
|
.ent fault
|
|
fault: li v0, -EFAULT
|
|
jr ra
|
|
.end fault
|