linux/arch/mips/alchemy
Manuel Lauss 8e0d7372f5 MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefully
Now that the r4k timer is registered no matter what, bump the rating of
the Alchemy 32kHz timer so that it gets used when it is working,
and fall back on the r4k when it isn't.

This fixes a timer-related hang on platform with a working 32kHz timer
(the better rated c0 timer stops while executing 'wait' leading to (almost)
eternal sleep) and an oops on boot on platforms without a working 32kHz
timer (due to double registration of the r4k timer).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc:  Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/4728/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-27 16:27:35 +01:00
..
common MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefully 2012-12-27 16:27:35 +01:00
devboards MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code. 2012-10-11 11:11:20 +02:00
board-gpr.c MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single files 2011-12-07 22:02:06 +00:00
board-mtx1.c MIPS: MTX-1: Add udelay to mtx1_pci_idsel 2012-08-17 10:57:27 +02:00
board-xxs1500.c MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single files 2011-12-07 22:02:06 +00:00
Kconfig MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code. 2012-10-11 11:11:20 +02:00
Makefile MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single files 2011-12-07 22:02:06 +00:00
Platform MIPS: Alchemy: Single kernel for DB1200/1300/1550 2012-10-11 11:11:20 +02:00