linux/arch/x86/pci
Bjorn Helgaas 237865f195 PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code"
Revert dff22d2054 ("PCI: Call pci_read_bridge_bases() from core instead
of arch code").

Reading PCI bridge windows is not arch-specific in itself, but there is PCI
core code that doesn't work correctly if we read them too early.  For
example, Hannes found this case on an ARM Freescale i.mx6 board:

  pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
  pci 0000:00:00.0: PCI bridge to [bus 01-ff]
  pci 0000:00:00.0: BAR 8: no space for [mem size 0x01000000] (mem window)
  pci 0000:01:00.0: BAR 2: failed to assign [mem size 0x00200000]
  pci 0000:01:00.0: BAR 1: failed to assign [mem size 0x00004000]
  pci 0000:01:00.0: BAR 0: failed to assign [mem size 0x00000100]

The 00:00.0 mem window needs to be at least 3MB: the 01:00.0 device needs
0x204100 of space, and mem windows are megabyte-aligned.

Bus sizing can increase a bridge window size, but never *decrease* it (see
d65245c329 ("PCI: don't shrink bridge resources")).  Prior to
dff22d2054, ARM didn't read bridge windows at all, so the "original size"
was zero, and we assigned a 3MB window.

After dff22d2054, we read the bridge windows before sizing the bus.  The
firmware programmed a 16MB window (size 0x01000000) in 00:00.0, and since
we never decrease the size, we kept 16MB even though we only needed 3MB.
But 16MB doesn't fit in the host bridge aperture, so we failed to assign
space for the window and the downstream devices.

I think this is a defect in the PCI core: we shouldn't rely on the firmware
to assign sensible windows.

Ray reported a similar problem, also on ARM, with Broadcom iProc.

Issues like this are too hard to fix right now, so revert dff22d2054.

Reported-by: Hannes <oe5hpm@gmail.com>
Reported-by: Ray Jui <rjui@broadcom.com>
Link: http://lkml.kernel.org/r/CAAa04yFQEUJm7Jj1qMT57-LG7ZGtnhNDBe=PpSRa70Mj+XhW-A@mail.gmail.com
Link: http://lkml.kernel.org/r/55F75BB8.4070405@broadcom.com
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Yinghai Lu <yinghai@kernel.org>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2015-09-15 13:18:04 -05:00
..
acpi.c PCI changes for the v4.2 merge window: 2015-06-23 13:41:24 -07:00
amd_bus.c x86/PCI: Clean up and mark early_root_info_init() as deprecated 2014-05-27 10:47:49 -06:00
broadcom_bus.c x86/PCI: Fix Broadcom CNB20LE unintended sign extension 2014-04-25 11:01:08 -06:00
bus_numa.c PCI: Use common resource list management code instead of private implementation 2015-02-05 15:09:25 +01:00
bus_numa.h x86/PCI: put busn resource in pci_root_info for native host bridge drivers 2012-06-13 15:42:24 -06:00
ce4100.c x86/ce4100: Fix PCI configuration register access for devices without interrupts 2012-10-30 10:16:47 +01:00
common.c PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code" 2015-09-15 13:18:04 -05:00
direct.c x86: constify PCI raw ops structures 2011-10-14 09:05:28 -07:00
early.c x86/PCI: remove early PCI pr_debug statements 2009-11-24 15:25:19 -08:00
fixup.c PCI: Fix generic NCR 53c810 class code quirk 2015-07-14 13:39:44 -05:00
i386.c x86/mm/pat: Wrap pat_enabled into a function API 2015-05-27 14:41:01 +02:00
init.c x86, olpc: Use pci subarch init for OLPC 2010-02-25 19:26:23 -08:00
intel_mid_pci.c Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2015-09-01 10:33:31 -07:00
irq.c PCI: Add helpers to manage pci_dev->irq and pci_dev->irq_managed 2015-07-30 14:13:20 -05:00
legacy.c x86/PCI: Use pcibios_scan_root() instead of pci_scan_bus_on_node() 2014-02-03 10:38:18 -07:00
Makefile x86, platforms: Remove NUMAQ 2014-02-27 08:07:39 -08:00
mmconfig_32.c ACPI: Clean up inclusions of ACPI header files 2013-12-07 01:03:14 +01:00
mmconfig_64.c X86: drivers: remove __dev* attributes. 2013-01-03 15:57:04 -08:00
mmconfig-shared.c ACPI and power management updates for v3.20-rc1 2015-02-10 15:09:41 -08:00
numachip.c x86: numachip: APIC driver cleanups 2014-11-04 18:17:27 +01:00
olpc.c x86: constify PCI raw ops structures 2011-10-14 09:05:28 -07:00
pcbios.c x86/PCI: Mark PCI BIOS initialization code as such 2014-09-24 06:46:27 -06:00
sta2x11-fixup.c x86: enable DMA CMA with swiotlb 2014-06-04 16:53:57 -07:00
xen.c x86/PCI: Use for_pci_msi_entry() to access MSI device list 2015-07-22 18:37:43 +02:00