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Setup the cpu_logical_map during boot. Moreover, every SBI call and PLIC context are based on the physical hartid. Use the logical CPU to hartid mapping to pass correct hartid to respective functions. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
80 lines
2.2 KiB
C
80 lines
2.2 KiB
C
/*
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* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
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* Copyright (C) 2012 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_TLBFLUSH_H
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#define _ASM_RISCV_TLBFLUSH_H
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#include <linux/mm_types.h>
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#include <asm/smp.h>
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/*
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* Flush entire local TLB. 'sfence.vma' implicitly fences with the instruction
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* cache as well, so a 'fence.i' is not necessary.
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*/
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static inline void local_flush_tlb_all(void)
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{
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__asm__ __volatile__ ("sfence.vma" : : : "memory");
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}
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/* Flush one page from local TLB */
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static inline void local_flush_tlb_page(unsigned long addr)
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{
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__asm__ __volatile__ ("sfence.vma %0" : : "r" (addr) : "memory");
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}
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#ifndef CONFIG_SMP
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#define flush_tlb_all() local_flush_tlb_all()
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#define flush_tlb_page(vma, addr) local_flush_tlb_page(addr)
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static inline void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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local_flush_tlb_all();
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}
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#define flush_tlb_mm(mm) flush_tlb_all()
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#else /* CONFIG_SMP */
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#include <asm/sbi.h>
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static inline void remote_sfence_vma(struct cpumask *cmask, unsigned long start,
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unsigned long size)
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{
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struct cpumask hmask;
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cpumask_clear(&hmask);
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riscv_cpuid_to_hartid_mask(cmask, &hmask);
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sbi_remote_sfence_vma(hmask.bits, start, size);
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}
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#define flush_tlb_all() sbi_remote_sfence_vma(NULL, 0, -1)
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#define flush_tlb_page(vma, addr) flush_tlb_range(vma, addr, 0)
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#define flush_tlb_range(vma, start, end) \
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remote_sfence_vma(mm_cpumask((vma)->vm_mm), start, (end) - (start))
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#define flush_tlb_mm(mm) \
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remote_sfence_vma(mm_cpumask(mm), 0, -1)
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#endif /* CONFIG_SMP */
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/* Flush a range of kernel pages */
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static inline void flush_tlb_kernel_range(unsigned long start,
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unsigned long end)
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{
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flush_tlb_all();
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}
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#endif /* _ASM_RISCV_TLBFLUSH_H */
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