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04759194dc
- VMAP_STACK support, allowing the kernel stacks to be allocated in the vmalloc space with a guard page for trapping stack overflows. One of the patches introduces THREAD_ALIGN and changes the generic alloc_thread_stack_node() to use this instead of THREAD_SIZE (no functional change for other architectures) - Contiguous PTE hugetlb support re-enabled (after being reverted a couple of times). We now have the semantics agreed in the generic mm layer together with API improvements so that the architecture code can detect between contiguous and non-contiguous huge PTEs - Initial support for persistent memory on ARM: DC CVAP instruction exposed to user space (HWCAP) and the in-kernel pmem API implemented - raid6 improvements for arm64: faster algorithm for the delta syndrome and implementation of the recovery routines using Neon - FP/SIMD refactoring and removal of support for Neon in interrupt context. This is in preparation for full SVE support - PTE accessors converted from inline asm to cmpxchg so that we can use LSE atomics if available (ARMv8.1) - Perf support for Cortex-A35 and A73 - Non-urgent fixes and cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAlmuunYACgkQa9axLQDI XvEH9BAAo8V94GOMkX6HkT+2hjkl7DQ9krjumzmfzLV5AdgHMMzBNozmWKOCzgh0 yaxRcTUju3EyNeKhADr7yLiKDH8fnRPmYEJiVrwfgo7MaPApaCorr7LLIXfPGuxe DTBHw+oxRMjlmaHeATX4PBWfQxAx+vjjhHqv3Qpmvdm4nYqR+0hZomH2BNsu64fk AkSeUCxfCEyzSFIKuQM04M4zhSSZHz1tDxWI0b0RcK73qqEOuYZNkn6qxSKP5J4X b2Y2U8nmxJ5C2fXpDYZaK9shiJ4Vu7X3Ocf/M7hsJzGY5z4dhnmUmxpHROaNiSvo hCx7POYKyAPovps7zMSqcdsujkqOIQO8RHp4zGXx/pIr1RumjIiCY+RGpUYGibvU N4Px5hZNneuHaPZZ+sWjOOdNB28xyzeUp2UK9Bb6uHB+/3xssMAD8Fd/b2ZLnS6a YW3wrZmqA+ckfETsSRibabTs/ayqYHs2SDVwnlDJGtn+4Pw8oQpwGrwokxLQuuw3 uF2sNEPhJz+dcy21q3udYAQE1qOJBlLqTptgP96CHoVqh8X6nYSi5obT7y30ln3n dhpZGOdi6R8YOouxgXS3Wg07pxn444L/VzDw5ku/5DkdryPOZCSRbk/2t8If6oDM 2VD6PCbTx3hsGc7SZ7FdSwIysD2j446u40OMGdH2iLB5jWBwyOM= =vd0/ -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - VMAP_STACK support, allowing the kernel stacks to be allocated in the vmalloc space with a guard page for trapping stack overflows. One of the patches introduces THREAD_ALIGN and changes the generic alloc_thread_stack_node() to use this instead of THREAD_SIZE (no functional change for other architectures) - Contiguous PTE hugetlb support re-enabled (after being reverted a couple of times). We now have the semantics agreed in the generic mm layer together with API improvements so that the architecture code can detect between contiguous and non-contiguous huge PTEs - Initial support for persistent memory on ARM: DC CVAP instruction exposed to user space (HWCAP) and the in-kernel pmem API implemented - raid6 improvements for arm64: faster algorithm for the delta syndrome and implementation of the recovery routines using Neon - FP/SIMD refactoring and removal of support for Neon in interrupt context. This is in preparation for full SVE support - PTE accessors converted from inline asm to cmpxchg so that we can use LSE atomics if available (ARMv8.1) - Perf support for Cortex-A35 and A73 - Non-urgent fixes and cleanups * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (75 commits) arm64: cleanup {COMPAT_,}SET_PERSONALITY() macro arm64: introduce separated bits for mm_context_t flags arm64: hugetlb: Cleanup setup_hugepagesz arm64: Re-enable support for contiguous hugepages arm64: hugetlb: Override set_huge_swap_pte_at() to support contiguous hugepages arm64: hugetlb: Override huge_pte_clear() to support contiguous hugepages arm64: hugetlb: Handle swap entries in huge_pte_offset() for contiguous hugepages arm64: hugetlb: Add break-before-make logic for contiguous entries arm64: hugetlb: Spring clean huge pte accessors arm64: hugetlb: Introduce pte_pgprot helper arm64: hugetlb: set_huge_pte_at Add WARN_ON on !pte_present arm64: kexec: have own crash_smp_send_stop() for crash dump for nonpanic cores arm64: dma-mapping: Mark atomic_pool as __ro_after_init arm64: dma-mapping: Do not pass data to gen_pool_set_algo() arm64: Remove the !CONFIG_ARM64_HW_AFDBM alternative code paths arm64: Ignore hardware dirty bit updates in ptep_set_wrprotect() arm64: Move PTE_RDONLY bit handling out of set_pte_at() kvm: arm64: Convert kvm_set_s2pte_readonly() from inline asm to cmpxchg() arm64: Convert pte handling from inline asm to using (cmp)xchg arm64: neon/efi: Make EFI fpsimd save/restore variables static ...
366 lines
9.7 KiB
C
366 lines
9.7 KiB
C
/*
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* Based on arch/arm/include/asm/uaccess.h
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*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_UACCESS_H
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#define __ASM_UACCESS_H
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#include <asm/alternative.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/sysreg.h>
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/*
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* User space memory access functions
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*/
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#include <linux/bitops.h>
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#include <linux/kasan-checks.h>
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#include <linux/string.h>
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#include <asm/cpufeature.h>
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#include <asm/ptrace.h>
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#include <asm/memory.h>
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#include <asm/compiler.h>
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#include <asm/extable.h>
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#define KERNEL_DS (-1UL)
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#define get_ds() (KERNEL_DS)
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#define USER_DS TASK_SIZE_64
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#define get_fs() (current_thread_info()->addr_limit)
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static inline void set_fs(mm_segment_t fs)
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{
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current_thread_info()->addr_limit = fs;
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/* On user-mode return, check fs is correct */
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set_thread_flag(TIF_FSCHECK);
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/*
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* Enable/disable UAO so that copy_to_user() etc can access
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* kernel memory with the unprivileged instructions.
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*/
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if (IS_ENABLED(CONFIG_ARM64_UAO) && fs == KERNEL_DS)
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asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
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else
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asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO,
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CONFIG_ARM64_UAO));
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}
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#define segment_eq(a, b) ((a) == (b))
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/*
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* Test whether a block of memory is a valid user space address.
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* Returns 1 if the range is valid, 0 otherwise.
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*
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* This is equivalent to the following test:
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* (u65)addr + (u65)size <= current->addr_limit
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*
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* This needs 65-bit arithmetic.
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*/
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#define __range_ok(addr, size) \
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({ \
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unsigned long __addr = (unsigned long)(addr); \
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unsigned long flag, roksum; \
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__chk_user_ptr(addr); \
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asm("adds %1, %1, %3; ccmp %1, %4, #2, cc; cset %0, ls" \
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: "=&r" (flag), "=&r" (roksum) \
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: "1" (__addr), "Ir" (size), \
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"r" (current_thread_info()->addr_limit) \
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: "cc"); \
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flag; \
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})
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/*
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* When dealing with data aborts, watchpoints, or instruction traps we may end
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* up with a tagged userland pointer. Clear the tag to get a sane pointer to
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* pass on to access_ok(), for instance.
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*/
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#define untagged_addr(addr) sign_extend64(addr, 55)
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#define access_ok(type, addr, size) __range_ok(addr, size)
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#define user_addr_max get_fs
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#define _ASM_EXTABLE(from, to) \
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" .pushsection __ex_table, \"a\"\n" \
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" .align 3\n" \
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" .long (" #from " - .), (" #to " - .)\n" \
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" .popsection\n"
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/*
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* User access enabling/disabling.
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*/
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN
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static inline void __uaccess_ttbr0_disable(void)
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{
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unsigned long ttbr;
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/* reserved_ttbr0 placed at the end of swapper_pg_dir */
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ttbr = read_sysreg(ttbr1_el1) + SWAPPER_DIR_SIZE;
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write_sysreg(ttbr, ttbr0_el1);
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isb();
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}
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static inline void __uaccess_ttbr0_enable(void)
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{
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unsigned long flags;
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/*
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* Disable interrupts to avoid preemption between reading the 'ttbr0'
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* variable and the MSR. A context switch could trigger an ASID
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* roll-over and an update of 'ttbr0'.
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*/
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local_irq_save(flags);
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write_sysreg(current_thread_info()->ttbr0, ttbr0_el1);
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isb();
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local_irq_restore(flags);
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}
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static inline bool uaccess_ttbr0_disable(void)
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{
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if (!system_uses_ttbr0_pan())
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return false;
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__uaccess_ttbr0_disable();
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return true;
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}
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static inline bool uaccess_ttbr0_enable(void)
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{
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if (!system_uses_ttbr0_pan())
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return false;
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__uaccess_ttbr0_enable();
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return true;
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}
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#else
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static inline bool uaccess_ttbr0_disable(void)
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{
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return false;
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}
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static inline bool uaccess_ttbr0_enable(void)
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{
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return false;
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}
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#endif
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#define __uaccess_disable(alt) \
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do { \
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if (!uaccess_ttbr0_disable()) \
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \
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CONFIG_ARM64_PAN)); \
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} while (0)
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#define __uaccess_enable(alt) \
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do { \
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if (!uaccess_ttbr0_enable()) \
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \
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CONFIG_ARM64_PAN)); \
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} while (0)
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static inline void uaccess_disable(void)
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{
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__uaccess_disable(ARM64_HAS_PAN);
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}
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static inline void uaccess_enable(void)
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{
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__uaccess_enable(ARM64_HAS_PAN);
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}
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/*
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* These functions are no-ops when UAO is present.
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*/
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static inline void uaccess_disable_not_uao(void)
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{
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__uaccess_disable(ARM64_ALT_PAN_NOT_UAO);
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}
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static inline void uaccess_enable_not_uao(void)
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{
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__uaccess_enable(ARM64_ALT_PAN_NOT_UAO);
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}
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/*
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* The "__xxx" versions of the user access functions do not verify the address
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* space - it must have been done previously with a separate "access_ok()"
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* call.
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*
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* The "__xxx_error" versions set the third argument to -EFAULT if an error
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* occurs, and leave it unchanged on success.
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*/
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#define __get_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
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asm volatile( \
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"1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
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alt_instr " " reg "1, [%2]\n", feature) \
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"2:\n" \
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" .section .fixup, \"ax\"\n" \
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" .align 2\n" \
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"3: mov %w0, %3\n" \
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" mov %1, #0\n" \
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" b 2b\n" \
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" .previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: "+r" (err), "=&r" (x) \
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: "r" (addr), "i" (-EFAULT))
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#define __get_user_err(x, ptr, err) \
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do { \
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unsigned long __gu_val; \
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__chk_user_ptr(ptr); \
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uaccess_enable_not_uao(); \
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switch (sizeof(*(ptr))) { \
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case 1: \
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__get_user_asm("ldrb", "ldtrb", "%w", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 2: \
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__get_user_asm("ldrh", "ldtrh", "%w", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 4: \
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__get_user_asm("ldr", "ldtr", "%w", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 8: \
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__get_user_asm("ldr", "ldtr", "%x", __gu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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default: \
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BUILD_BUG(); \
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} \
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uaccess_disable_not_uao(); \
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(x) = (__force __typeof__(*(ptr)))__gu_val; \
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} while (0)
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#define __get_user(x, ptr) \
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({ \
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int __gu_err = 0; \
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__get_user_err((x), (ptr), __gu_err); \
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__gu_err; \
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})
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#define __get_user_error(x, ptr, err) \
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({ \
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__get_user_err((x), (ptr), (err)); \
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(void)0; \
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})
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#define get_user(x, ptr) \
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({ \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \
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__get_user((x), __p) : \
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((x) = 0, -EFAULT); \
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})
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#define __put_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
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asm volatile( \
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"1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
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alt_instr " " reg "1, [%2]\n", feature) \
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"2:\n" \
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" .section .fixup,\"ax\"\n" \
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" .align 2\n" \
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"3: mov %w0, %3\n" \
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" b 2b\n" \
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" .previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: "+r" (err) \
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: "r" (x), "r" (addr), "i" (-EFAULT))
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#define __put_user_err(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __pu_val = (x); \
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__chk_user_ptr(ptr); \
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uaccess_enable_not_uao(); \
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switch (sizeof(*(ptr))) { \
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case 1: \
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__put_user_asm("strb", "sttrb", "%w", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 2: \
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__put_user_asm("strh", "sttrh", "%w", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 4: \
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__put_user_asm("str", "sttr", "%w", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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case 8: \
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__put_user_asm("str", "sttr", "%x", __pu_val, (ptr), \
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(err), ARM64_HAS_UAO); \
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break; \
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default: \
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BUILD_BUG(); \
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} \
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uaccess_disable_not_uao(); \
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} while (0)
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#define __put_user(x, ptr) \
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({ \
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int __pu_err = 0; \
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__put_user_err((x), (ptr), __pu_err); \
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__pu_err; \
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})
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#define __put_user_error(x, ptr, err) \
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({ \
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__put_user_err((x), (ptr), (err)); \
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(void)0; \
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})
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#define put_user(x, ptr) \
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({ \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \
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__put_user((x), __p) : \
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-EFAULT; \
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})
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extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
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#define raw_copy_from_user __arch_copy_from_user
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extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
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#define raw_copy_to_user __arch_copy_to_user
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extern unsigned long __must_check raw_copy_in_user(void __user *to, const void __user *from, unsigned long n);
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extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n);
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#define INLINE_COPY_TO_USER
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#define INLINE_COPY_FROM_USER
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static inline unsigned long __must_check clear_user(void __user *to, unsigned long n)
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{
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if (access_ok(VERIFY_WRITE, to, n))
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n = __clear_user(to, n);
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return n;
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}
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extern long strncpy_from_user(char *dest, const char __user *src, long count);
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extern __must_check long strnlen_user(const char __user *str, long n);
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#ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE
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struct page;
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void memcpy_page_flushcache(char *to, struct page *page, size_t offset, size_t len);
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extern unsigned long __must_check __copy_user_flushcache(void *to, const void __user *from, unsigned long n);
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static inline int __copy_from_user_flushcache(void *dst, const void __user *src, unsigned size)
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{
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kasan_check_write(dst, size);
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return __copy_user_flushcache(dst, src, size);
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}
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#endif
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#endif /* __ASM_UACCESS_H */
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