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154d62e4cd
1. Corrected shift values of I2S and UART clocks (CLK_GATE_IP3), which were defined incorrectly. 2. Corrected shift values of sclk_audio, uclk1, sclk_fimd, sclk_mmc, sclk_spi, sclk_pwm, which had duplicated .enable/.ctrlbit with their twins defined in struct clk init_clocks_disable[] and struct clk init_clocks[]. We've changed their .enable/.ctrlbit to use CLK_SRC_MASK register to avoid the duplicated clock problem described below. NOTE: Duplicated Clock Problem Please note that each clock definition should access different control register; otherwise, the system may suffer lockups. For example, if we have two clock definitions "a" and "b" which access the same register (and the shift value). Then, when we do: module A clk = clk_get("a"); clk->clk_enable(clk); module B (context switch) clk = clk_get("b"); clk->clk_enable(clk); do something with clk. clk->clk_disable(clk); module A (context switch) do something with clk * At this point, the system may hang. Therefore, there should be no clock definitions with the same contol register/shift. If we need to create "aliases", then, creating child clocks sharing the clock should be fine. 3. Corrected other sclk_* shift values and access registers. Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: minor title and message fix] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> |
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.. | ||
include/mach | ||
clock.c | ||
cpu.c | ||
dev-audio.c | ||
dev-onenand.c | ||
dev-spi.c | ||
dma.c | ||
gpiolib.c | ||
init.c | ||
Kconfig | ||
mach-aquila.c | ||
mach-goni.c | ||
mach-smdkc110.c | ||
mach-smdkv210.c | ||
Makefile | ||
Makefile.boot | ||
setup-fb-24bpp.c | ||
setup-i2c0.c | ||
setup-i2c1.c | ||
setup-i2c2.c | ||
setup-sdhci-gpio.c | ||
setup-sdhci.c |