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Adjust the file for it to be properly parsed by Sphinx, adding it to the index of the book it belongs. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
210 lines
7.7 KiB
ReStructuredText
210 lines
7.7 KiB
ReStructuredText
=====================================
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Amiga Buddha and Catweasel IDE Driver
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=====================================
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The Amiga Buddha and Catweasel IDE Driver (part of ide.c) was written by
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Geert Uytterhoeven based on the following specifications:
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------------------------------------------------------------------------
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Register map of the Buddha IDE controller and the
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Buddha-part of the Catweasel Zorro-II version
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The Autoconfiguration has been implemented just as Commodore
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described in their manuals, no tricks have been used (for
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example leaving some address lines out of the equations...).
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If you want to configure the board yourself (for example let
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a Linux kernel configure the card), look at the Commodore
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Docs. Reading the nibbles should give this information::
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Vendor number: 4626 ($1212)
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product number: 0 (42 for Catweasel Z-II)
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Serial number: 0
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Rom-vector: $1000
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The card should be a Z-II board, size 64K, not for freemem
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list, Rom-Vektor is valid, no second Autoconfig-board on the
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same card, no space preference, supports "Shutup_forever".
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Setting the base address should be done in two steps, just
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as the Amiga Kickstart does: The lower nibble of the 8-Bit
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address is written to $4a, then the whole Byte is written to
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$48, while it doesn't matter how often you're writing to $4a
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as long as $48 is not touched. After $48 has been written,
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the whole card disappears from $e8 and is mapped to the new
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address just written. Make sure $4a is written before $48,
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otherwise your chance is only 1:16 to find the board :-).
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The local memory-map is even active when mapped to $e8:
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============== ===========================================
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$0-$7e Autokonfig-space, see Z-II docs.
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$80-$7fd reserved
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$7fe Speed-select Register: Read & Write
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(description see further down)
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$800-$8ff IDE-Select 0 (Port 0, Register set 0)
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$900-$9ff IDE-Select 1 (Port 0, Register set 1)
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$a00-$aff IDE-Select 2 (Port 1, Register set 0)
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$b00-$bff IDE-Select 3 (Port 1, Register set 1)
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$c00-$cff IDE-Select 4 (Port 2, Register set 0,
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Catweasel only!)
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$d00-$dff IDE-Select 5 (Port 3, Register set 1,
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Catweasel only!)
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$e00-$eff local expansion port, on Catweasel Z-II the
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Catweasel registers are also mapped here.
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Never touch, use multidisk.device!
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$f00 read only, Byte-access: Bit 7 shows the
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level of the IRQ-line of IDE port 0.
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$f01-$f3f mirror of $f00
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$f40 read only, Byte-access: Bit 7 shows the
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level of the IRQ-line of IDE port 1.
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$f41-$f7f mirror of $f40
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$f80 read only, Byte-access: Bit 7 shows the
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level of the IRQ-line of IDE port 2.
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(Catweasel only!)
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$f81-$fbf mirror of $f80
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$fc0 write-only: Writing any value to this
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register enables IRQs to be passed from the
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IDE ports to the Zorro bus. This mechanism
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has been implemented to be compatible with
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harddisks that are either defective or have
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a buggy firmware and pull the IRQ line up
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while starting up. If interrupts would
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always be passed to the bus, the computer
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might not start up. Once enabled, this flag
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can not be disabled again. The level of the
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flag can not be determined by software
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(what for? Write to me if it's necessary!).
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$fc1-$fff mirror of $fc0
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$1000-$ffff Buddha-Rom with offset $1000 in the rom
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chip. The addresses $0 to $fff of the rom
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chip cannot be read. Rom is Byte-wide and
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mapped to even addresses.
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============== ===========================================
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The IDE ports issue an INT2. You can read the level of the
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IRQ-lines of the IDE-ports by reading from the three (two
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for Buddha-only) registers $f00, $f40 and $f80. This way
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more than one I/O request can be handled and you can easily
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determine what driver has to serve the INT2. Buddha and
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Catweasel expansion boards can issue an INT6. A separate
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memory map is available for the I/O module and the sysop's
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I/O module.
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The IDE ports are fed by the address lines A2 to A4, just as
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the Amiga 1200 and Amiga 4000 IDE ports are. This way
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existing drivers can be easily ported to Buddha. A move.l
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polls two words out of the same address of IDE port since
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every word is mirrored once. movem is not possible, but
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it's not necessary either, because you can only speedup
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68000 systems with this technique. A 68020 system with
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fastmem is faster with move.l.
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If you're using the mirrored registers of the IDE-ports with
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A6=1, the Buddha doesn't care about the speed that you have
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selected in the speed register (see further down). With
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A6=1 (for example $840 for port 0, register set 0), a 780ns
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access is being made. These registers should be used for a
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command access to the harddisk/CD-Rom, since command
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accesses are Byte-wide and have to be made slower according
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to the ATA-X3T9 manual.
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Now for the speed-register: The register is byte-wide, and
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only the upper three bits are used (Bits 7 to 5). Bit 4
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must always be set to 1 to be compatible with later Buddha
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versions (if I'll ever update this one). I presume that
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I'll never use the lower four bits, but they have to be set
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to 1 by definition.
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The values in this table have to be shifted 5 bits to the
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left and or'd with $1f (this sets the lower 5 bits).
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All the timings have in common: Select and IOR/IOW rise at
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the same time. IOR and IOW have a propagation delay of
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about 30ns to the clocks on the Zorro bus, that's why the
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values are no multiple of 71. One clock-cycle is 71ns long
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(exactly 70,5 at 14,18 Mhz on PAL systems).
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value 0 (Default after reset)
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497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
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(same timing as the Amiga 1200 does on it's IDE port without
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accelerator card)
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value 1
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639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
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value 2
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781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
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value 3
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355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
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value 4
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355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
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value 5
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355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
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value 6
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1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
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value 7
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355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
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When accessing IDE registers with A6=1 (for example $84x),
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the timing will always be mode 0 8-bit compatible, no matter
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what you have selected in the speed register:
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781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.
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All the timings with a very short select-signal (the 355ns
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fast accesses) depend on the accelerator card used in the
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system: Sometimes two more clock cycles are inserted by the
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bus interface, making the whole access 497ns long. This
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doesn't affect the reliability of the controller nor the
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performance of the card, since this doesn't happen very
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often.
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All the timings are calculated and only confirmed by
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measurements that allowed me to count the clock cycles. If
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the system is clocked by an oscillator other than 28,37516
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Mhz (for example the NTSC-frequency 28,63636 Mhz), each
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clock cycle is shortened to a bit less than 70ns (not worth
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mentioning). You could think of a small performance boost
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by overclocking the system, but you would either need a
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multisync monitor, or a graphics card, and your internal
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diskdrive would go crazy, that's why you shouldn't tune your
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Amiga this way.
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Giving you the possibility to write software that is
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compatible with both the Buddha and the Catweasel Z-II, The
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Buddha acts just like a Catweasel Z-II with no device
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connected to the third IDE-port. The IRQ-register $f80
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always shows a "no IRQ here" on the Buddha, and accesses to
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the third IDE port are going into data's Nirwana on the
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Buddha.
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Jens Schönfeld february 19th, 1997
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updated may 27th, 1997
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eMail: sysop@nostlgic.tng.oche.de
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