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12402f825d
Update iProc I2C binding document to add new compatible string "brcm,iproc-nic-i2c". Optional property "brcm,ape-hsls-addr-mask" is also added that allows configuration of the host view into the APE's address for "brcm,iproc-nic-i2c" Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
47 lines
1.1 KiB
Plaintext
47 lines
1.1 KiB
Plaintext
Broadcom iProc I2C controller
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Required properties:
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- compatible:
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Must be "brcm,iproc-i2c" or "brcm,iproc-nic-i2c"
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- reg:
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Define the base and range of the I/O address space that contain the iProc
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I2C controller registers
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- clock-frequency:
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This is the I2C bus clock. Need to be either 100000 or 400000
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- #address-cells:
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Always 1 (for I2C addresses)
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- #size-cells:
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Always 0
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Optional properties:
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- interrupts:
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Should contain the I2C interrupt. For certain revisions of the I2C
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controller, I2C interrupt is unwired to the interrupt controller. In such
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case, this property should be left unspecified, and driver will fall back
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to polling mode
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- brcm,ape-hsls-addr-mask:
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Required for "brcm,iproc-nic-i2c". Host view of address mask into the
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'APE' co-processor. Value must be unsigned, 32-bit
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Example:
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i2c0: i2c@18008000 {
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compatible = "brcm,iproc-i2c";
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reg = <0x18008000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
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clock-frequency = <100000>;
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codec: wm8750@1a {
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compatible = "wlf,wm8750";
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reg = <0x1a>;
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};
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};
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