mirror of
https://github.com/torvalds/linux.git
synced 2024-12-28 22:02:28 +00:00
df59fa7f4b
The Armada SoC family implementation of this SPI hardware module has extended the configuration register to allow for a wider range of SPI clock rates. Specifically the Serial Baud Rate Pre-selection bits in the SPI Interface Configuration Register now also use bits 6 and 7 as well. Modify the baud rate calculation to handle these differences for the Armada case. Potentially a baud rate can be setup using a number of different pre-scalar and scalar combinations. This code tries all possible pre-scalar divisors (8 in total) to try and find the most accurate set. This change introduces (and documents) a new device tree compatible device name "armada-370-spi" to support this. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
20 lines
549 B
Plaintext
20 lines
549 B
Plaintext
Marvell Orion SPI device
|
|
|
|
Required properties:
|
|
- compatible : should be "marvell,orion-spi" or "marvell,armada-370-spi".
|
|
- reg : offset and length of the register set for the device
|
|
- cell-index : Which of multiple SPI controllers is this.
|
|
Optional properties:
|
|
- interrupts : Is currently not used.
|
|
|
|
Example:
|
|
spi@10600 {
|
|
compatible = "marvell,orion-spi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
cell-index = <0>;
|
|
reg = <0x10600 0x28>;
|
|
interrupts = <23>;
|
|
status = "disabled";
|
|
};
|