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171d809df1
The following patch merges the mmu and non-mmu versions of the m68k bitops.h files. Now there is a good deal of difference between the two files, but none of it is actually an mmu specific difference. It is all about the specific m68k/coldfire varient we are targeting. So it makes an awful lot of sense to merge these into a single bitops.h. There is a number of ways I can see to factor this code. The approach I have taken here is to keep the various versions of each macro/function type together. This means that there is some ifdefery with each to handle each CPU type. I have added some comments in a couple of appropriate places to try and make it clear what the differences we are dealing with are. Specifically the instruction and addressing mode differences we have to deal with. The merged form keeps the same underlying optimizations for each CPU type for all the general bit clear/set/change and find bit operations. It does switch to using the generic le operations though, instead of any local varients. Build tested on ColdFire, 68328, 68360 (which is cpu32) and 68020+. Run tested on ColdFire and ARAnyM. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
788 lines
17 KiB
Plaintext
788 lines
17 KiB
Plaintext
config FPU
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bool
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default n
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config GENERIC_GPIO
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bool
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default n
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config GENERIC_CMOS_UPDATE
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bool
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default y
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config GENERIC_CLOCKEVENTS
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bool
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default n
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config M68000
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bool
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select CPU_HAS_NO_BITFIELDS
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help
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The Freescale (was Motorola) 68000 CPU is the first generation of
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the well known M68K family of processors. The CPU core as well as
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being available as a stand alone CPU was also used in many
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System-On-Chip devices (eg 68328, 68302, etc). It does not contain
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a paging MMU.
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config MCPU32
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bool
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select CPU_HAS_NO_BITFIELDS
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help
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The Freescale (was then Motorola) CPU32 is a CPU core that is
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based on the 68020 processor. For the most part it is used in
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System-On-Chip parts, and does not contain a paging MMU.
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config COLDFIRE
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bool
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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select CPU_HAS_NO_BITFIELDS
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help
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The Freescale ColdFire family of processors is a modern derivitive
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of the 68000 processor family. They are mainly targeted at embedded
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applications, and are all System-On-Chip (SOC) devices, as opposed
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to stand alone CPUs. They implement a subset of the original 68000
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processor instruction set.
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config COLDFIRE_SW_A7
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bool
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default n
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config HAVE_CACHE_SPLIT
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bool
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config HAVE_CACHE_CB
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bool
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config HAVE_MBAR
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bool
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config HAVE_IPSBAR
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bool
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choice
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prompt "CPU"
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default M68EZ328
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config M68328
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bool "MC68328"
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select M68000
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help
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Motorola 68328 processor support.
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config M68EZ328
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bool "MC68EZ328"
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select M68000
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help
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Motorola 68EX328 processor support.
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config M68VZ328
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bool "MC68VZ328"
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select M68000
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help
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Motorola 68VZ328 processor support.
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config M68360
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bool "MC68360"
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select MCPU32
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help
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Motorola 68360 processor support.
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config M5206
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bool "MCF5206"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5206 processor support.
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config M5206e
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bool "MCF5206e"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5206e processor support.
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config M520x
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bool "MCF520x"
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select COLDFIRE
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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help
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Freescale Coldfire 5207/5208 processor support.
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config M523x
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bool "MCF523x"
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select COLDFIRE
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale Coldfire 5230/1/2/4/5 processor support
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config M5249
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bool "MCF5249"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5249 processor support.
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config M5271
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bool "MCF5271"
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select COLDFIRE
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale (Motorola) ColdFire 5270/5271 processor support.
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config M5272
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bool "MCF5272"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5272 processor support.
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config M5275
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bool "MCF5275"
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select COLDFIRE
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale (Motorola) ColdFire 5274/5275 processor support.
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config M528x
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bool "MCF528x"
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select COLDFIRE
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Motorola ColdFire 5280/5282 processor support.
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config M5307
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bool "MCF5307"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Motorola ColdFire 5307 processor support.
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config M532x
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bool "MCF532x"
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select COLDFIRE
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select HAVE_CACHE_CB
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help
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Freescale (Motorola) ColdFire 532x processor support.
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config M5407
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bool "MCF5407"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Motorola ColdFire 5407 processor support.
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config M547x
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bool "MCF547x"
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select COLDFIRE
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
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config M548x
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bool "MCF548x"
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select COLDFIRE
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
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endchoice
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config M527x
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bool
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depends on (M5271 || M5275)
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select GENERIC_CLOCKEVENTS
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default y
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config M54xx
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bool
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depends on (M548x || M547x)
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default y
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config CLOCK_SET
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bool "Enable setting the CPU clock frequency"
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default n
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help
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On some CPU's you do not need to know what the core CPU clock
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frequency is. On these you can disable clock setting. On some
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traditional 68K parts, and on all ColdFire parts you need to set
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the appropriate CPU clock frequency. On these devices many of the
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onboard peripherals derive their timing from the master CPU clock
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frequency.
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config CLOCK_FREQ
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int "Set the core clock frequency"
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default "66666666"
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depends on CLOCK_SET
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help
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Define the CPU clock frequency in use. This is the core clock
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frequency, it may or may not be the same as the external clock
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crystal fitted to your board. Some processors have an internal
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PLL and can have their frequency programmed at run time, others
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use internal dividers. In general the kernel won't setup a PLL
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if it is fitted (there are some exceptions). This value will be
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specific to the exact CPU that you are using.
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config OLDMASK
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bool "Old mask 5307 (1H55J) silicon"
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depends on M5307
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help
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Build support for the older revision ColdFire 5307 silicon.
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Specifically this is the 1H55J mask revision.
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if HAVE_CACHE_SPLIT
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choice
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prompt "Split Cache Configuration"
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default CACHE_I
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config CACHE_I
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bool "Instruction"
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help
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Use all of the ColdFire CPU cache memory as an instruction cache.
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config CACHE_D
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bool "Data"
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help
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Use all of the ColdFire CPU cache memory as a data cache.
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config CACHE_BOTH
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bool "Both"
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help
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Split the ColdFire CPU cache, and use half as an instruction cache
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and half as a data cache.
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endchoice
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endif
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if HAVE_CACHE_CB
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choice
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prompt "Data cache mode"
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default CACHE_WRITETHRU
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config CACHE_WRITETHRU
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bool "Write-through"
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help
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The ColdFire CPU cache is set into Write-through mode.
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config CACHE_COPYBACK
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bool "Copy-back"
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help
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The ColdFire CPU cache is set into Copy-back mode.
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endchoice
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endif
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comment "Platform"
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config PILOT3
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bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support"
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depends on M68328
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help
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Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
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config XCOPILOT_BUGS
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bool "(X)Copilot support"
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depends on PILOT3
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help
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Support the bugs of Xcopilot.
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config UC5272
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bool 'Arcturus Networks uC5272 dimm board support'
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depends on M5272
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help
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Support for the Arcturus Networks uC5272 dimm board.
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config UC5282
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bool "Arcturus Networks uC5282 board support"
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depends on M528x
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help
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Support for the Arcturus Networks uC5282 dimm board.
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config UCSIMM
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bool "uCsimm module support"
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depends on M68EZ328
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help
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Support for the Arcturus Networks uCsimm module.
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config UCDIMM
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bool "uDsimm module support"
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depends on M68VZ328
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help
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Support for the Arcturus Networks uDsimm module.
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config DRAGEN2
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bool "DragenEngine II board support"
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depends on M68VZ328
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help
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Support for the DragenEngine II board.
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config DIRECT_IO_ACCESS
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bool "Allow user to access IO directly"
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depends on (UCSIMM || UCDIMM || DRAGEN2)
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help
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Disable the CPU internal registers protection in user mode,
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to allow a user application to read/write them.
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config INIT_LCD
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bool "Initialize LCD"
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depends on (UCSIMM || UCDIMM || DRAGEN2)
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help
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Initialize the LCD controller of the 68x328 processor.
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config MEMORY_RESERVE
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int "Memory reservation (MiB)"
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depends on (UCSIMM || UCDIMM)
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help
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Reserve certain memory regions on 68x328 based boards.
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config UCQUICC
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bool "Lineo uCquicc board support"
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depends on M68360
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help
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Support for the Lineo uCquicc board.
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config ARN5206
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bool "Arnewsh 5206 board support"
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depends on M5206
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help
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Support for the Arnewsh 5206 board.
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config M5206eC3
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bool "Motorola M5206eC3 board support"
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depends on M5206e
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help
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Support for the Motorola M5206eC3 board.
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config ELITE
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bool "Motorola M5206eLITE board support"
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depends on M5206e
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help
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Support for the Motorola M5206eLITE board.
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config M5208EVB
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bool "Freescale M5208EVB board support"
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depends on M520x
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help
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Support for the Freescale Coldfire M5208EVB.
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config M5235EVB
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bool "Freescale M5235EVB support"
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depends on M523x
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help
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Support for the Freescale M5235EVB board.
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config M5249C3
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bool "Motorola M5249C3 board support"
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depends on M5249
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help
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Support for the Motorola M5249C3 board.
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config M5271EVB
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bool "Freescale (Motorola) M5271EVB board support"
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depends on M5271
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help
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Support for the Freescale (Motorola) M5271EVB board.
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config M5275EVB
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bool "Freescale (Motorola) M5275EVB board support"
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depends on M5275
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help
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Support for the Freescale (Motorola) M5275EVB board.
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config M5272C3
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bool "Motorola M5272C3 board support"
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depends on M5272
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help
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Support for the Motorola M5272C3 board.
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config COBRA5272
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bool "senTec COBRA5272 board support"
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depends on M5272
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help
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Support for the senTec COBRA5272 board.
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config AVNET5282
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bool "Avnet 5282 board support"
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depends on M528x
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help
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Support for the Avnet 5282 board.
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config M5282EVB
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bool "Motorola M5282EVB board support"
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depends on M528x
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help
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Support for the Motorola M5282EVB board.
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config COBRA5282
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bool "senTec COBRA5282 board support"
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depends on M528x
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help
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Support for the senTec COBRA5282 board.
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config SOM5282EM
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bool "EMAC.Inc SOM5282EM board support"
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depends on M528x
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help
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Support for the EMAC.Inc SOM5282EM module.
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config WILDFIRE
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bool "Intec Automation Inc. WildFire board support"
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depends on M528x
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help
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Support for the Intec Automation Inc. WildFire.
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config WILDFIREMOD
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bool "Intec Automation Inc. WildFire module support"
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depends on M528x
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help
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Support for the Intec Automation Inc. WildFire module.
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config ARN5307
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bool "Arnewsh 5307 board support"
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depends on M5307
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help
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Support for the Arnewsh 5307 board.
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config M5307C3
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bool "Motorola M5307C3 board support"
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depends on M5307
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help
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Support for the Motorola M5307C3 board.
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config SECUREEDGEMP3
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bool "SnapGear SecureEdge/MP3 platform support"
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depends on M5307
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help
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Support for the SnapGear SecureEdge/MP3 platform.
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config M5329EVB
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bool "Freescale (Motorola) M5329EVB board support"
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depends on M532x
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help
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Support for the Freescale (Motorola) M5329EVB board.
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config COBRA5329
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bool "senTec COBRA5329 board support"
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depends on M532x
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help
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Support for the senTec COBRA5329 board.
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config M5407C3
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bool "Motorola M5407C3 board support"
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depends on M5407
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help
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Support for the Motorola M5407C3 board.
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config FIREBEE
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bool "FireBee board support"
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depends on M547x
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help
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Support for the FireBee ColdFire 5475 based board.
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config CLEOPATRA
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bool "Feith CLEOPATRA board support"
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depends on (M5307 || M5407)
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help
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Support for the Feith Cleopatra boards.
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config CANCam
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bool "Feith CANCam board support"
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depends on M5272
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help
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Support for the Feith CANCam board.
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config SCALES
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bool "Feith SCALES board support"
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depends on M5272
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help
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Support for the Feith SCALES board.
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config NETtel
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bool "SecureEdge/NETtel board support"
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depends on (M5206e || M5272 || M5307)
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help
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Support for the SnapGear NETtel/SecureEdge/SnapGear boards.
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config SNAPGEAR
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bool "SnapGear router board support"
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depends on NETtel
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help
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Special additional support for SnapGear router boards.
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config CPU16B
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bool "Sneha Technologies S.L. Sarasvati board support"
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depends on M5272
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|
help
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|
Support for the SNEHA CPU16B board.
|
|
|
|
config MOD5272
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bool "Netburner MOD-5272 board support"
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depends on M5272
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help
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|
Support for the Netburner MOD-5272 board.
|
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|
|
config SAVANTrosie1
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bool "Savant Rosie1 board support"
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depends on M523x
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|
help
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|
Support for the Savant Rosie1 board.
|
|
|
|
config ROMFS_FROM_ROM
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|
bool "ROMFS image not RAM resident"
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depends on (NETtel || SNAPGEAR)
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|
help
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|
The ROMfs filesystem will stay resident in the FLASH/ROM, not be
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|
moved into RAM.
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|
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config PILOT
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bool
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|
default y
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|
depends on (PILOT3 || PILOT5)
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|
|
config ARNEWSH
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|
bool
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|
default y
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|
depends on (ARN5206 || ARN5307)
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|
|
config FREESCALE
|
|
bool
|
|
default y
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|
depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3)
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|
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config HW_FEITH
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|
bool
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|
default y
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|
depends on (CLEOPATRA || CANCam || SCALES)
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|
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config senTec
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bool
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default y
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depends on (COBRA5272 || COBRA5282)
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config EMAC_INC
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bool
|
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default y
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depends on (SOM5282EM)
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config SNEHA
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bool
|
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default y
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depends on CPU16B
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config SAVANT
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bool
|
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default y
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depends on SAVANTrosie1
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config AVNET
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bool
|
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default y
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depends on (AVNET5282)
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|
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config UBOOT
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bool "Support for U-Boot command line parameters"
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help
|
|
If you say Y here kernel will try to collect command
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line parameters from the initial u-boot stack.
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default n
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config 4KSTACKS
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bool "Use 4Kb for kernel stacks instead of 8Kb"
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default y
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help
|
|
If you say Y here the kernel will use a 4Kb stacksize for the
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|
kernel stack attached to each process/thread. This facilitates
|
|
running more threads on a system and also reduces the pressure
|
|
on the VM subsystem for higher order allocations.
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|
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comment "RAM configuration"
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|
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config RAMBASE
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hex "Address of the base of RAM"
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default "0"
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help
|
|
Define the address that RAM starts at. On many platforms this is
|
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0, the base of the address space. And this is the default. Some
|
|
platforms choose to setup their RAM at other addresses within the
|
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processor address space.
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config RAMSIZE
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hex "Size of RAM (in bytes), or 0 for automatic"
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default "0x400000"
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help
|
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Define the size of the system RAM. If you select 0 then the
|
|
kernel will try to probe the RAM size at runtime. This is not
|
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supported on all CPU types.
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|
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config VECTORBASE
|
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hex "Address of the base of system vectors"
|
|
default "0"
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help
|
|
Define the address of the system vectors. Commonly this is
|
|
put at the start of RAM, but it doesn't have to be. On ColdFire
|
|
platforms this address is programmed into the VBR register, thus
|
|
actually setting the address to use.
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|
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config MBAR
|
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hex "Address of the MBAR (internal peripherals)"
|
|
default "0x10000000"
|
|
depends on HAVE_MBAR
|
|
help
|
|
Define the address of the internal system peripherals. This value
|
|
is set in the processors MBAR register. This is generally setup by
|
|
the boot loader, and will not be written by the kernel. By far most
|
|
ColdFire boards use the default 0x10000000 value, so if unsure then
|
|
use this.
|
|
|
|
config IPSBAR
|
|
hex "Address of the IPSBAR (internal peripherals)"
|
|
default "0x40000000"
|
|
depends on HAVE_IPSBAR
|
|
help
|
|
Define the address of the internal system peripherals. This value
|
|
is set in the processors IPSBAR register. This is generally setup by
|
|
the boot loader, and will not be written by the kernel. By far most
|
|
ColdFire boards use the default 0x40000000 value, so if unsure then
|
|
use this.
|
|
|
|
config KERNELBASE
|
|
hex "Address of the base of kernel code"
|
|
default "0x400"
|
|
help
|
|
Typically on m68k systems the kernel will not start at the base
|
|
of RAM, but usually some small offset from it. Define the start
|
|
address of the kernel here. The most common setup will have the
|
|
processor vectors at the base of RAM and then the start of the
|
|
kernel. On some platforms some RAM is reserved for boot loaders
|
|
and the kernel starts after that. The 0x400 default was based on
|
|
a system with the RAM based at address 0, and leaving enough room
|
|
for the theoretical maximum number of 256 vectors.
|
|
|
|
choice
|
|
prompt "RAM bus width"
|
|
default RAMAUTOBIT
|
|
|
|
config RAMAUTOBIT
|
|
bool "AUTO"
|
|
help
|
|
Select the physical RAM data bus size. Not needed on most platforms,
|
|
so you can generally choose AUTO.
|
|
|
|
config RAM8BIT
|
|
bool "8bit"
|
|
help
|
|
Configure RAM bus to be 8 bits wide.
|
|
|
|
config RAM16BIT
|
|
bool "16bit"
|
|
help
|
|
Configure RAM bus to be 16 bits wide.
|
|
|
|
config RAM32BIT
|
|
bool "32bit"
|
|
help
|
|
Configure RAM bus to be 32 bits wide.
|
|
|
|
endchoice
|
|
|
|
comment "ROM configuration"
|
|
|
|
config ROM
|
|
bool "Specify ROM linker regions"
|
|
default n
|
|
help
|
|
Define a ROM region for the linker script. This creates a kernel
|
|
that can be stored in flash, with possibly the text, and data
|
|
regions being copied out to RAM at startup.
|
|
|
|
config ROMBASE
|
|
hex "Address of the base of ROM device"
|
|
default "0"
|
|
depends on ROM
|
|
help
|
|
Define the address that the ROM region starts at. Some platforms
|
|
use this to set their chip select region accordingly for the boot
|
|
device.
|
|
|
|
config ROMVEC
|
|
hex "Address of the base of the ROM vectors"
|
|
default "0"
|
|
depends on ROM
|
|
help
|
|
This is almost always the same as the base of the ROM. Since on all
|
|
68000 type variants the vectors are at the base of the boot device
|
|
on system startup.
|
|
|
|
config ROMVECSIZE
|
|
hex "Size of ROM vector region (in bytes)"
|
|
default "0x400"
|
|
depends on ROM
|
|
help
|
|
Define the size of the vector region in ROM. For most 68000
|
|
variants this would be 0x400 bytes in size. Set to 0 if you do
|
|
not want a vector region at the start of the ROM.
|
|
|
|
config ROMSTART
|
|
hex "Address of the base of system image in ROM"
|
|
default "0x400"
|
|
depends on ROM
|
|
help
|
|
Define the start address of the system image in ROM. Commonly this
|
|
is strait after the ROM vectors.
|
|
|
|
config ROMSIZE
|
|
hex "Size of the ROM device"
|
|
default "0x100000"
|
|
depends on ROM
|
|
help
|
|
Size of the ROM device. On some platforms this is used to setup
|
|
the chip select that controls the boot ROM device.
|
|
|
|
choice
|
|
prompt "Kernel executes from"
|
|
---help---
|
|
Choose the memory type that the kernel will be running in.
|
|
|
|
config RAMKERNEL
|
|
bool "RAM"
|
|
help
|
|
The kernel will be resident in RAM when running.
|
|
|
|
config ROMKERNEL
|
|
bool "ROM"
|
|
help
|
|
The kernel will be resident in FLASH/ROM when running. This is
|
|
often referred to as Execute-in-Place (XIP), since the kernel
|
|
code executes from the position it is stored in the FLASH/ROM.
|
|
|
|
endchoice
|
|
|
|
if COLDFIRE
|
|
source "kernel/Kconfig.preempt"
|
|
endif
|
|
|
|
source "kernel/time/Kconfig"
|
|
|
|
config ISA_DMA_API
|
|
bool
|
|
depends on !M5272
|
|
default y
|
|
|
|
source "drivers/pcmcia/Kconfig"
|
|
|