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Add Broadcom Secure Processing Unit (SPU) crypto driver for SPU hardware crypto offload. The driver supports ablkcipher, ahash, and aead symmetric crypto operations. Signed-off-by: Steve Lin <steven.lin1@broadcom.com> Signed-off-by: Rob Rice <rob.rice@broadcom.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
175 lines
5.3 KiB
C
175 lines
5.3 KiB
C
/*
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* Copyright 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation (the "GPL").
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License version 2 (GPLv2) for more details.
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*
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* You should have received a copy of the GNU General Public License
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* version 2 (GPLv2) along with this source code.
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*/
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/*
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* This file contains SPU message definitions specific to SPU-M.
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*/
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#ifndef _SPUM_H_
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#define _SPUM_H_
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#define SPU_CRYPTO_OPERATION_GENERIC 0x1
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/* Length of STATUS field in tx and rx packets */
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#define SPU_TX_STATUS_LEN 4
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/* SPU-M error codes */
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#define SPU_STATUS_MASK 0x0000FF00
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#define SPU_STATUS_SUCCESS 0x00000000
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#define SPU_STATUS_INVALID_ICV 0x00000100
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#define SPU_STATUS_ERROR_FLAG 0x00020000
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/* Request message. MH + EMH + BDESC + BD header */
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#define SPU_REQ_FIXED_LEN 24
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/*
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* Max length of a SPU message header. Used to allocate a buffer where
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* the SPU message header is constructed. Can be used for either a SPU-M
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* header or a SPU2 header.
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* For SPU-M, sum of the following:
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* MH - 4 bytes
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* EMH - 4
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* SCTX - 3 +
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* max auth key len - 64
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* max cipher key len - 264 (RC4)
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* max IV len - 16
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* BDESC - 12
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* BD header - 4
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* Total: 371
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*
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* For SPU2, FMD_SIZE (32) plus lengths of hash and cipher keys,
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* hash and cipher IVs. If SPU2 does not support RC4, then
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*/
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#define SPU_HEADER_ALLOC_LEN (SPU_REQ_FIXED_LEN + MAX_KEY_SIZE + \
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MAX_KEY_SIZE + MAX_IV_SIZE)
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/*
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* Response message header length. Normally MH, EMH, BD header, but when
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* BD_SUPPRESS is used for hash requests, there is no BD header.
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*/
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#define SPU_RESP_HDR_LEN 12
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#define SPU_HASH_RESP_HDR_LEN 8
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/*
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* Max value that can be represented in the Payload Length field of the BD
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* header. This is a 16-bit field.
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*/
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#define SPUM_NS2_MAX_PAYLOAD (BIT(16) - 1)
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/*
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* NSP SPU is limited to ~9KB because of FA2 FIFO size limitations;
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* Set MAX_PAYLOAD to 8k to allow for addition of header, digest, etc.
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* and stay within limitation.
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*/
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#define SPUM_NSP_MAX_PAYLOAD 8192
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/* Buffer Descriptor Header [BDESC]. SPU in big-endian mode. */
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struct BDESC_HEADER {
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u16 offset_mac; /* word 0 [31-16] */
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u16 length_mac; /* word 0 [15-0] */
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u16 offset_crypto; /* word 1 [31-16] */
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u16 length_crypto; /* word 1 [15-0] */
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u16 offset_icv; /* word 2 [31-16] */
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u16 offset_iv; /* word 2 [15-0] */
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};
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/* Buffer Data Header [BD]. SPU in big-endian mode. */
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struct BD_HEADER {
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u16 size;
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u16 prev_length;
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};
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/* Command Context Header. SPU-M in big endian mode. */
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struct MHEADER {
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u8 flags; /* [31:24] */
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u8 op_code; /* [23:16] */
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u16 reserved; /* [15:0] */
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};
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/* MH header flags bits */
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#define MH_SUPDT_PRES BIT(0)
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#define MH_HASH_PRES BIT(2)
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#define MH_BD_PRES BIT(3)
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#define MH_MFM_PRES BIT(4)
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#define MH_BDESC_PRES BIT(5)
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#define MH_SCTX_PRES BIT(7)
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/* SCTX word 0 bit offsets and fields masks */
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#define SCTX_SIZE 0x000000FF
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/* SCTX word 1 bit shifts and field masks */
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#define UPDT_OFST 0x000000FF /* offset of SCTX updateable fld */
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#define HASH_TYPE 0x00000300 /* hash alg operation type */
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#define HASH_TYPE_SHIFT 8
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#define HASH_MODE 0x00001C00 /* one of spu2_hash_mode */
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#define HASH_MODE_SHIFT 10
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#define HASH_ALG 0x0000E000 /* hash algorithm */
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#define HASH_ALG_SHIFT 13
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#define CIPHER_TYPE 0x00030000 /* encryption operation type */
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#define CIPHER_TYPE_SHIFT 16
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#define CIPHER_MODE 0x001C0000 /* encryption mode */
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#define CIPHER_MODE_SHIFT 18
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#define CIPHER_ALG 0x00E00000 /* encryption algo */
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#define CIPHER_ALG_SHIFT 21
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#define ICV_IS_512 BIT(27)
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#define ICV_IS_512_SHIFT 27
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#define CIPHER_ORDER BIT(30)
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#define CIPHER_ORDER_SHIFT 30
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#define CIPHER_INBOUND BIT(31)
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#define CIPHER_INBOUND_SHIFT 31
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/* SCTX word 2 bit shifts and field masks */
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#define EXP_IV_SIZE 0x7
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#define IV_OFFSET BIT(3)
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#define IV_OFFSET_SHIFT 3
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#define GEN_IV BIT(5)
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#define GEN_IV_SHIFT 5
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#define EXPLICIT_IV BIT(6)
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#define EXPLICIT_IV_SHIFT 6
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#define SCTX_IV BIT(7)
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#define SCTX_IV_SHIFT 7
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#define ICV_SIZE 0x0F00
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#define ICV_SIZE_SHIFT 8
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#define CHECK_ICV BIT(12)
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#define CHECK_ICV_SHIFT 12
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#define INSERT_ICV BIT(13)
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#define INSERT_ICV_SHIFT 13
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#define BD_SUPPRESS BIT(19)
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#define BD_SUPPRESS_SHIFT 19
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/* Generic Mode Security Context Structure [SCTX] */
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struct SCTX {
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/* word 0: protocol flags */
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u32 proto_flags;
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/* word 1: cipher flags */
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u32 cipher_flags;
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/* word 2: Extended cipher flags */
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u32 ecf;
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};
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struct SPUHEADER {
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struct MHEADER mh;
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u32 emh;
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struct SCTX sa;
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};
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#endif /* _SPUM_H_ */
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