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35373abbce
The UPF_* flags are the correct values to use for struct uart_port and struct old_serial_port/SERIAL_PORT_DFNS. Signed-off-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
155 lines
4.5 KiB
C
155 lines
4.5 KiB
C
/*
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* The setup file for serial related hardware on PMC-Sierra MSP processors.
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*
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* Copyright 2005 PMC-Sierra, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/slab.h>
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#include <asm/bootinfo.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/serial.h>
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#include <linux/serial_8250.h>
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#include <msp_prom.h>
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#include <msp_int.h>
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#include <msp_regs.h>
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struct msp_uart_data {
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int last_lcr;
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};
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static void msp_serial_out(struct uart_port *p, int offset, int value)
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{
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struct msp_uart_data *d = p->private_data;
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if (offset == UART_LCR)
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d->last_lcr = value;
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offset <<= p->regshift;
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writeb(value, p->membase + offset);
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}
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static unsigned int msp_serial_in(struct uart_port *p, int offset)
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{
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offset <<= p->regshift;
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return readb(p->membase + offset);
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}
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static int msp_serial_handle_irq(struct uart_port *p)
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{
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struct msp_uart_data *d = p->private_data;
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unsigned int iir = readb(p->membase + (UART_IIR << p->regshift));
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if (serial8250_handle_irq(p, iir)) {
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return 1;
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} else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
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/*
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* The DesignWare APB UART has an Busy Detect (0x07) interrupt
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* meaning an LCR write attempt occurred while the UART was
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* busy. The interrupt must be cleared by reading the UART
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* status register (USR) and the LCR re-written.
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*
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* Note: MSP reserves 0x20 bytes of address space for the UART
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* and the USR is mapped in a separate block at an offset of
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* 0xc0 from the start of the UART.
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*/
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(void)readb(p->membase + 0xc0);
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writeb(d->last_lcr, p->membase + (UART_LCR << p->regshift));
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return 1;
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}
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return 0;
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}
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void __init msp_serial_setup(void)
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{
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char *s;
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char *endp;
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struct uart_port up;
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unsigned int uartclk;
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memset(&up, 0, sizeof(up));
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/* Check if clock was specified in environment */
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s = prom_getenv("uartfreqhz");
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if(!(s && *s && (uartclk = simple_strtoul(s, &endp, 10)) && *endp == 0))
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uartclk = MSP_BASE_BAUD;
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ppfinit("UART clock set to %d\n", uartclk);
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/* Initialize first serial port */
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up.mapbase = MSP_UART0_BASE;
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up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
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up.irq = MSP_INT_UART0;
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up.uartclk = uartclk;
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up.regshift = 2;
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up.iotype = UPIO_MEM;
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up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
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up.type = PORT_16550A;
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up.line = 0;
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up.serial_out = msp_serial_out;
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up.serial_in = msp_serial_in;
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up.handle_irq = msp_serial_handle_irq;
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up.private_data = kzalloc(sizeof(struct msp_uart_data), GFP_KERNEL);
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if (!up.private_data) {
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pr_err("failed to allocate uart private data\n");
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return;
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}
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if (early_serial_setup(&up)) {
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kfree(up.private_data);
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pr_err("Early serial init of port 0 failed\n");
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}
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/* Initialize the second serial port, if one exists */
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switch (mips_machtype) {
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case MACH_MSP4200_EVAL:
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case MACH_MSP4200_GW:
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case MACH_MSP4200_FPGA:
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case MACH_MSP7120_EVAL:
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case MACH_MSP7120_GW:
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case MACH_MSP7120_FPGA:
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/* Enable UART1 on MSP4200 and MSP7120 */
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*GPIO_CFG2_REG = 0x00002299;
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break;
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default:
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return; /* No second serial port, good-bye. */
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}
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up.mapbase = MSP_UART1_BASE;
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up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
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up.irq = MSP_INT_UART1;
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up.line = 1;
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up.private_data = (void*)UART1_STATUS_REG;
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if (early_serial_setup(&up)) {
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kfree(up.private_data);
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pr_err("Early serial init of port 1 failed\n");
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}
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}
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