Archit Taneja cea65dbd6a drm/msm/dsi: Add dsi_cfg for APQ8064 ... Add a dsi_cfg entry for APQ8064. Since this is the first DSIv2 chip to be supported, add a list of bus clocks that are required by the DSIv2 block. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>		2015-12-14 10:40:40 -05:00
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phy	drm/msm/dsi: Add support for 28nm PHY on 8960	2015-12-14 10:40:06 -05:00
pll	drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY	2015-12-14 10:40:12 -05:00
dsi_cfg.c	drm/msm/dsi: Add dsi_cfg for APQ8064	2015-12-14 10:40:40 -05:00
dsi_cfg.h	drm/msm/dsi: Add dsi_cfg for APQ8064	2015-12-14 10:40:40 -05:00
dsi_host.c	drm/msm/dsi: Set up link clocks for DSIv2	2015-12-14 10:40:35 -05:00
dsi_manager.c	drm/msm/dsi: Modify dsi manager bridge ops to work with external bridges	2015-08-15 18:27:26 -04:00
dsi.c	drm/msm/dsi: Allow dsi to connect to an external bridge	2015-08-15 18:27:25 -04:00
dsi.h	drm/msm/dsi: Parse bus clocks from a list	2015-12-14 10:40:30 -05:00
dsi.xml.h	drm/msm: update generated headers	2015-10-22 15:39:44 -04:00
mmss_cc.xml.h	drm/msm: update generated headers	2015-10-22 15:39:44 -04:00
sfpb.xml.h	drm/msm: update generated headers	2015-10-22 15:39:44 -04:00