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1eb88a5d4a
set the initial sequence number so the 1st byte of payload is aligned on the 8-byte boundary. Signed-off-by: Karen Xie <kxie@chelsio.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <JBottomley@Odin.com>
46 lines
1.0 KiB
C
46 lines
1.0 KiB
C
/*
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* cxgb4i.h: Chelsio T4 iSCSI driver.
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*
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* Copyright (c) 2010-2015 Chelsio Communications, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*
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* Written by: Karen Xie (kxie@chelsio.com)
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* Written by: Rakesh Ranjan (rranjan@chelsio.com)
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*/
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#ifndef __CXGB4I_H__
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#define __CXGB4I_H__
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#define CXGB4I_SCSI_HOST_QDEPTH 1024
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#define CXGB4I_MAX_CONN 16384
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#define CXGB4I_MAX_TARGET CXGB4I_MAX_CONN
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#define CXGB4I_MAX_LUN 0x1000
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/* for TX: a skb must have a headroom of at least TX_HEADER_LEN bytes */
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#define CXGB4I_TX_HEADER_LEN \
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(sizeof(struct fw_ofld_tx_data_wr) + sizeof(struct sge_opaque_hdr))
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#define T5_ISS_VALID (1 << 18)
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struct ulptx_idata {
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__be32 cmd_more;
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__be32 len;
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};
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struct cpl_rx_data_ddp {
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union opcode_tid ot;
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__be16 urg;
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__be16 len;
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__be32 seq;
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union {
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__be32 nxt_seq;
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__be32 ddp_report;
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};
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__be32 ulp_crc;
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__be32 ddpvld;
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};
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#endif /* __CXGB4I_H__ */
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