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cc4c07c89a
We used to unconditionnally expose the cycle and instret csrs to userspace, which gives rise to security concerns. So now we only allow access to hw counters from userspace through the perf framework which will handle context switches, per-task events...etc. A sysctl allows to revert the behaviour to the legacy mode so that userspace applications which are not ready for this change do not break. But the default value is to allow userspace only through perf: this will break userspace applications which rely on direct access to rdcycle. This choice was made for security reasons [1][2]: most of the applications which use rdcycle can instead use rdtime to count the elapsed time. [1] https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/REWcwYnzsKE?pli=1 [2] https://www.youtube.com/watch?v=3-c4C_L2PRQ&ab_channel=IEEESymposiumonSecurityandPrivacy Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> |
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amlogic | ||
arm_cspmu | ||
hisilicon | ||
alibaba_uncore_drw_pmu.c | ||
apple_m1_cpu_pmu.c | ||
arm_dmc620_pmu.c | ||
arm_dsu_pmu.c | ||
arm_pmu_acpi.c | ||
arm_pmu_platform.c | ||
arm_pmu.c | ||
arm_pmuv3.c | ||
arm_smmuv3_pmu.c | ||
arm_spe_pmu.c | ||
arm-cci.c | ||
arm-ccn.c | ||
arm-cmn.c | ||
cxl_pmu.c | ||
fsl_imx8_ddr_perf.c | ||
fsl_imx9_ddr_perf.c | ||
Kconfig | ||
Makefile | ||
marvell_cn10k_ddr_pmu.c | ||
marvell_cn10k_tad_pmu.c | ||
qcom_l2_pmu.c | ||
qcom_l3_pmu.c | ||
riscv_pmu_legacy.c | ||
riscv_pmu_sbi.c | ||
riscv_pmu.c | ||
thunderx2_pmu.c | ||
xgene_pmu.c |