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The binding definition is based on the generic DMA controller binding. Joel: * Droped reserved and queue DT entries from Documentation for now from the original patch series (v10) * Included properties in Documentation and clarified DMA properties (V11) * Made ti,hwmod option * Clarified DMA entries Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
35 lines
1.0 KiB
Plaintext
35 lines
1.0 KiB
Plaintext
TI EDMA
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Required properties:
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- compatible : "ti,edma3"
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- ti,edma-regions: Number of regions
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- ti,edma-slots: Number of slots
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- #dma-cells: Should be set to <1>
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Clients should use a single channel number per DMA request.
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- dma-channels: Specify total DMA channels per CC
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- reg: Memory map for accessing module
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- interrupt-parent: Interrupt controller the interrupt is routed through
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- interrupts: Exactly 3 interrupts need to be specified in the order:
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1. Transfer completion interrupt.
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2. Memory protection interrupt.
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3. Error interrupt.
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Optional properties:
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- ti,hwmods: Name of the hwmods associated to the EDMA
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- ti,edma-xbar-event-map: Crossbar event to channel map
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Example:
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edma: edma@49000000 {
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reg = <0x49000000 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <12 13 14>;
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compatible = "ti,edma3";
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ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
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#dma-cells = <1>;
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dma-channels = <64>;
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ti,edma-regions = <4>;
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ti,edma-slots = <256>;
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ti,edma-xbar-event-map = <1 12
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2 13>;
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};
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