Dong Aisheng ca8cc0fe0e mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly ... Disable DLL delay line settings explicitly during driver initialization in case ROM/uBoot had set an invalid delay. e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021, the uSDHC clock timing will become marginal when works on DDR mode due to default delay and will possibly see CRC errors in case the board is not perfectly designed on the eMMC chip layout. Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>		2016-07-25 10:34:54 +02:00
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card	mmc: block: Fix tag condition with packed writes	2016-07-25 10:34:13 +02:00
core	mmc: core: Extend sysfs with DSR register	2016-07-25 10:34:51 +02:00
host	mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly	2016-07-25 10:34:54 +02:00
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