mirror of
https://github.com/torvalds/linux.git
synced 2024-12-26 21:02:19 +00:00
ca6bc691b1
Later Allwinner SoCs split out the reset controls for individual modules out of the clock gate controls. The "Security System" crypto engine is no different. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
24 lines
782 B
Plaintext
24 lines
782 B
Plaintext
* Allwinner Security System found on A20 SoC
|
|
|
|
Required properties:
|
|
- compatible : Should be "allwinner,sun4i-a10-crypto".
|
|
- reg: Should contain the Security System register location and length.
|
|
- interrupts: Should contain the IRQ line for the Security System.
|
|
- clocks : List of clock specifiers, corresponding to ahb and ss.
|
|
- clock-names : Name of the functional clock, should be
|
|
* "ahb" : AHB gating clock
|
|
* "mod" : SS controller clock
|
|
|
|
Optional properties:
|
|
- resets : phandle + reset specifier pair
|
|
- reset-names : must contain "ahb"
|
|
|
|
Example:
|
|
crypto: crypto-engine@01c15000 {
|
|
compatible = "allwinner,sun4i-a10-crypto";
|
|
reg = <0x01c15000 0x1000>;
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&ahb_gates 5>, <&ss_clk>;
|
|
clock-names = "ahb", "mod";
|
|
};
|