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e183914af0
A lot of asm-optimized routines in arch/x86/crypto/ keep its
constants in .data. This is wrong, they should be on .rodata.
Mnay of these constants are the same in different modules.
For example, 128-bit shuffle mask 0x000102030405060708090A0B0C0D0E0F
exists in at least half a dozen places.
There is a way to let linker merge them and use just one copy.
The rules are as follows: mergeable objects of different sizes
should not share sections. You can't put them all in one .rodata
section, they will lose "mergeability".
GCC puts its mergeable constants in ".rodata.cstSIZE" sections,
or ".rodata.cstSIZE.<object_name>" if -fdata-sections is used.
This patch does the same:
.section .rodata.cst16.SHUF_MASK, "aM", @progbits, 16
It is important that all data in such section consists of
16-byte elements, not larger ones, and there are no implicit
use of one element from another.
When this is not the case, use non-mergeable section:
.section .rodata[.VAR_NAME], "a", @progbits
This reduces .data by ~15 kbytes:
text data bss dec hex filename
11097415 2705840 2630712 16433967 fac32f vmlinux-prev.o
11112095 2690672 2630712 16433479 fac147 vmlinux.o
Merged objects are visible in System.map:
ffffffff81a28810 r POLY
ffffffff81a28810 r POLY
ffffffff81a28820 r TWOONE
ffffffff81a28820 r TWOONE
ffffffff81a28830 r PSHUFFLE_BYTE_FLIP_MASK <- merged regardless of
ffffffff81a28830 r SHUF_MASK <------------- the name difference
ffffffff81a28830 r SHUF_MASK
ffffffff81a28830 r SHUF_MASK
..
ffffffff81a28d00 r K512 <- merged three identical 640-byte tables
ffffffff81a28d00 r K512
ffffffff81a28d00 r K512
Use of object names in section name suffixes is not strictly necessary,
but might help if someday link stage will use garbage collection
to eliminate unused sections (ld --gc-sections).
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
CC: Herbert Xu <herbert@gondor.apana.org.au>
CC: Josh Poimboeuf <jpoimboe@redhat.com>
CC: Xiaodong Liu <xiaodong.liu@intel.com>
CC: Megha Dey <megha.dey@intel.com>
CC: linux-crypto@vger.kernel.org
CC: x86@kernel.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
305 lines
7.7 KiB
ArmAsm
305 lines
7.7 KiB
ArmAsm
/*
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* Intel SHA Extensions optimized implementation of a SHA-1 update function
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Contact Information:
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* Sean Gulley <sean.m.gulley@intel.com>
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* Tim Chen <tim.c.chen@linux.intel.com>
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*
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* BSD LICENSE
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*
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* Copyright(c) 2015 Intel Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <linux/linkage.h>
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#define DIGEST_PTR %rdi /* 1st arg */
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#define DATA_PTR %rsi /* 2nd arg */
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#define NUM_BLKS %rdx /* 3rd arg */
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#define RSPSAVE %rax
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/* gcc conversion */
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#define FRAME_SIZE 32 /* space for 2x16 bytes */
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#define ABCD %xmm0
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#define E0 %xmm1 /* Need two E's b/c they ping pong */
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#define E1 %xmm2
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#define MSG0 %xmm3
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#define MSG1 %xmm4
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#define MSG2 %xmm5
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#define MSG3 %xmm6
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#define SHUF_MASK %xmm7
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/*
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* Intel SHA Extensions optimized implementation of a SHA-1 update function
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*
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* The function takes a pointer to the current hash values, a pointer to the
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* input data, and a number of 64 byte blocks to process. Once all blocks have
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* been processed, the digest pointer is updated with the resulting hash value.
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* The function only processes complete blocks, there is no functionality to
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* store partial blocks. All message padding and hash value initialization must
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* be done outside the update function.
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*
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* The indented lines in the loop are instructions related to rounds processing.
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* The non-indented lines are instructions related to the message schedule.
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*
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* void sha1_ni_transform(uint32_t *digest, const void *data,
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uint32_t numBlocks)
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* digest : pointer to digest
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* data: pointer to input data
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* numBlocks: Number of blocks to process
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*/
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.text
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.align 32
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ENTRY(sha1_ni_transform)
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mov %rsp, RSPSAVE
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sub $FRAME_SIZE, %rsp
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and $~0xF, %rsp
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shl $6, NUM_BLKS /* convert to bytes */
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jz .Ldone_hash
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add DATA_PTR, NUM_BLKS /* pointer to end of data */
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/* load initial hash values */
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pinsrd $3, 1*16(DIGEST_PTR), E0
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movdqu 0*16(DIGEST_PTR), ABCD
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pand UPPER_WORD_MASK(%rip), E0
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pshufd $0x1B, ABCD, ABCD
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movdqa PSHUFFLE_BYTE_FLIP_MASK(%rip), SHUF_MASK
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.Lloop0:
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/* Save hash values for addition after rounds */
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movdqa E0, (0*16)(%rsp)
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movdqa ABCD, (1*16)(%rsp)
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/* Rounds 0-3 */
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movdqu 0*16(DATA_PTR), MSG0
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pshufb SHUF_MASK, MSG0
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paddd MSG0, E0
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movdqa ABCD, E1
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sha1rnds4 $0, E0, ABCD
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/* Rounds 4-7 */
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movdqu 1*16(DATA_PTR), MSG1
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pshufb SHUF_MASK, MSG1
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sha1nexte MSG1, E1
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movdqa ABCD, E0
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sha1rnds4 $0, E1, ABCD
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sha1msg1 MSG1, MSG0
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/* Rounds 8-11 */
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movdqu 2*16(DATA_PTR), MSG2
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pshufb SHUF_MASK, MSG2
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sha1nexte MSG2, E0
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movdqa ABCD, E1
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sha1rnds4 $0, E0, ABCD
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sha1msg1 MSG2, MSG1
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pxor MSG2, MSG0
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/* Rounds 12-15 */
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movdqu 3*16(DATA_PTR), MSG3
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pshufb SHUF_MASK, MSG3
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sha1nexte MSG3, E1
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movdqa ABCD, E0
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sha1msg2 MSG3, MSG0
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sha1rnds4 $0, E1, ABCD
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sha1msg1 MSG3, MSG2
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pxor MSG3, MSG1
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/* Rounds 16-19 */
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sha1nexte MSG0, E0
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movdqa ABCD, E1
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sha1msg2 MSG0, MSG1
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sha1rnds4 $0, E0, ABCD
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sha1msg1 MSG0, MSG3
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pxor MSG0, MSG2
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/* Rounds 20-23 */
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sha1nexte MSG1, E1
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movdqa ABCD, E0
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sha1msg2 MSG1, MSG2
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sha1rnds4 $1, E1, ABCD
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sha1msg1 MSG1, MSG0
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pxor MSG1, MSG3
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/* Rounds 24-27 */
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sha1nexte MSG2, E0
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movdqa ABCD, E1
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sha1msg2 MSG2, MSG3
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sha1rnds4 $1, E0, ABCD
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sha1msg1 MSG2, MSG1
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pxor MSG2, MSG0
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/* Rounds 28-31 */
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sha1nexte MSG3, E1
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movdqa ABCD, E0
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sha1msg2 MSG3, MSG0
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sha1rnds4 $1, E1, ABCD
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sha1msg1 MSG3, MSG2
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pxor MSG3, MSG1
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/* Rounds 32-35 */
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sha1nexte MSG0, E0
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movdqa ABCD, E1
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sha1msg2 MSG0, MSG1
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sha1rnds4 $1, E0, ABCD
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sha1msg1 MSG0, MSG3
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pxor MSG0, MSG2
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/* Rounds 36-39 */
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sha1nexte MSG1, E1
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movdqa ABCD, E0
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sha1msg2 MSG1, MSG2
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sha1rnds4 $1, E1, ABCD
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sha1msg1 MSG1, MSG0
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pxor MSG1, MSG3
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/* Rounds 40-43 */
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sha1nexte MSG2, E0
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movdqa ABCD, E1
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sha1msg2 MSG2, MSG3
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sha1rnds4 $2, E0, ABCD
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sha1msg1 MSG2, MSG1
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pxor MSG2, MSG0
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/* Rounds 44-47 */
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sha1nexte MSG3, E1
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movdqa ABCD, E0
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sha1msg2 MSG3, MSG0
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sha1rnds4 $2, E1, ABCD
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sha1msg1 MSG3, MSG2
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pxor MSG3, MSG1
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/* Rounds 48-51 */
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sha1nexte MSG0, E0
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movdqa ABCD, E1
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sha1msg2 MSG0, MSG1
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sha1rnds4 $2, E0, ABCD
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sha1msg1 MSG0, MSG3
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pxor MSG0, MSG2
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/* Rounds 52-55 */
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sha1nexte MSG1, E1
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movdqa ABCD, E0
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sha1msg2 MSG1, MSG2
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sha1rnds4 $2, E1, ABCD
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sha1msg1 MSG1, MSG0
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pxor MSG1, MSG3
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/* Rounds 56-59 */
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sha1nexte MSG2, E0
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movdqa ABCD, E1
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sha1msg2 MSG2, MSG3
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sha1rnds4 $2, E0, ABCD
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sha1msg1 MSG2, MSG1
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pxor MSG2, MSG0
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/* Rounds 60-63 */
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sha1nexte MSG3, E1
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movdqa ABCD, E0
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sha1msg2 MSG3, MSG0
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sha1rnds4 $3, E1, ABCD
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sha1msg1 MSG3, MSG2
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pxor MSG3, MSG1
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/* Rounds 64-67 */
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sha1nexte MSG0, E0
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movdqa ABCD, E1
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sha1msg2 MSG0, MSG1
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sha1rnds4 $3, E0, ABCD
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sha1msg1 MSG0, MSG3
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pxor MSG0, MSG2
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/* Rounds 68-71 */
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sha1nexte MSG1, E1
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movdqa ABCD, E0
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sha1msg2 MSG1, MSG2
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sha1rnds4 $3, E1, ABCD
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pxor MSG1, MSG3
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/* Rounds 72-75 */
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sha1nexte MSG2, E0
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movdqa ABCD, E1
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sha1msg2 MSG2, MSG3
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sha1rnds4 $3, E0, ABCD
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/* Rounds 76-79 */
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sha1nexte MSG3, E1
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movdqa ABCD, E0
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sha1rnds4 $3, E1, ABCD
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/* Add current hash values with previously saved */
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sha1nexte (0*16)(%rsp), E0
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paddd (1*16)(%rsp), ABCD
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/* Increment data pointer and loop if more to process */
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add $64, DATA_PTR
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cmp NUM_BLKS, DATA_PTR
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jne .Lloop0
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/* Write hash values back in the correct order */
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pshufd $0x1B, ABCD, ABCD
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movdqu ABCD, 0*16(DIGEST_PTR)
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pextrd $3, E0, 1*16(DIGEST_PTR)
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.Ldone_hash:
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mov RSPSAVE, %rsp
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ret
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ENDPROC(sha1_ni_transform)
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.section .rodata.cst16.PSHUFFLE_BYTE_FLIP_MASK, "aM", @progbits, 16
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.align 16
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PSHUFFLE_BYTE_FLIP_MASK:
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.octa 0x000102030405060708090a0b0c0d0e0f
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.section .rodata.cst16.UPPER_WORD_MASK, "aM", @progbits, 16
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.align 16
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UPPER_WORD_MASK:
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.octa 0xFFFFFFFF000000000000000000000000
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