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This patch adds documentation of device tree bindings for the STM32 I2C controller. Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
34 lines
1.1 KiB
Plaintext
34 lines
1.1 KiB
Plaintext
* I2C controller embedded in STMicroelectronics STM32 I2C platform
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Required properties :
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- compatible : Must be "st,stm32f4-i2c"
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- reg : Offset and length of the register set for the device
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- interrupts : Must contain the interrupt id for I2C event and then the
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interrupt id for I2C error.
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- resets: Must contain the phandle to the reset controller.
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- clocks: Must contain the input clock of the I2C instance.
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- A pinctrl state named "default" must be defined to set pins in mode of
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operation for I2C transfer
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- #address-cells = <1>;
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- #size-cells = <0>;
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Optional properties :
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- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
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the default 100 kHz frequency will be used. As only Normal and Fast modes
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are supported, possible values are 100000 and 400000.
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Example :
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i2c@40005400 {
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compatible = "st,stm32f4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005400 0x400>;
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interrupts = <31>,
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<32>;
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resets = <&rcc 277>;
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clocks = <&rcc 0 149>;
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pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
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pinctrl-names = "default";
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};
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