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Convert the Renesas Serial Communication Interface ((H)SCI(F)(A|B)) Device Tree binding documentation to json-schema. Split the bindings in 5 files, one per major type, to ease expressing constraints. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Rob Herring <robh@kernel.org>
99 lines
2.3 KiB
YAML
99 lines
2.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/serial/renesas,scifb.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Renesas Serial Communications Interface with FIFO B (SCIFB)
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maintainers:
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- Geert Uytterhoeven <geert+renesas@glider.be>
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allOf:
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- $ref: serial.yaml#
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,scifb-r8a73a4 # R-Mobile APE6
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- renesas,scifb-r8a7740 # R-Mobile A1
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- renesas,scifb-sh73a0 # SH-Mobile AG5
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- const: renesas,scifb # generic SCIFB compatible UART
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- items:
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- enum:
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- renesas,scifb-r8a7743 # RZ/G1M
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- renesas,scifb-r8a7744 # RZ/G1N
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- renesas,scifb-r8a7745 # RZ/G1E
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- renesas,scifb-r8a7790 # R-Car H2
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- renesas,scifb-r8a7791 # R-Car M2-W
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- renesas,scifb-r8a7793 # R-Car M2-N
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- renesas,scifb-r8a7794 # R-Car E2
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- const: renesas,rcar-gen2-scifb # R-Car Gen2 and RZ/G1
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- const: renesas,scifb # generic SCIFB compatible UART
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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enum:
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- fck # UART functional clock
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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dmas:
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description:
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Must contain a list of pairs of references to DMA specifiers, one for
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transmission, and one for reception.
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dma-names:
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minItems: 2
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maxItems: 4
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items:
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enum:
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- tx
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- rx
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- power-domains
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if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rcar-gen2-scifb
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then:
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required:
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- resets
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examples:
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- |
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#include <dt-bindings/clock/r8a7740-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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scifb: serial@e6c30000 {
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compatible = "renesas,scifb-r8a7740", "renesas,scifb";
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reg = <0xe6c30000 0x100>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks R8A7740_CLK_SCIFB>;
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clock-names = "fck";
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power-domains = <&pd_a3sp>;
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};
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