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This adds Device Tree binding documentation for the external interrupt lines with configurable polarity present on some Layerscape SOCs. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20191107122115.6244-2-linux@rasmusvillemoes.dk
50 lines
1.6 KiB
Plaintext
50 lines
1.6 KiB
Plaintext
* Freescale Layerscape external IRQs
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Some Layerscape SOCs (LS1021A, LS1043A, LS1046A) support inverting
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the polarity of certain external interrupt lines.
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The device node must be a child of the node representing the
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Supplemental Configuration Unit (SCFG).
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Required properties:
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- compatible: should be "fsl,<soc-name>-extirq", e.g. "fsl,ls1021a-extirq".
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- #interrupt-cells: Must be 2. The first element is the index of the
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external interrupt line. The second element is the trigger type.
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- #address-cells: Must be 0.
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- interrupt-controller: Identifies the node as an interrupt controller
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- reg: Specifies the Interrupt Polarity Control Register (INTPCR) in
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the SCFG.
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- interrupt-map: Specifies the mapping from external interrupts to GIC
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interrupts.
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- interrupt-map-mask: Must be <0xffffffff 0>.
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Example:
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scfg: scfg@1570000 {
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compatible = "fsl,ls1021a-scfg", "syscon";
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reg = <0x0 0x1570000 0x0 0x10000>;
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big-endian;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x1570000 0x10000>;
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extirq: interrupt-controller@1ac {
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compatible = "fsl,ls1021a-extirq";
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#interrupt-cells = <2>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x1ac 4>;
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interrupt-map =
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<0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
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<1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
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<2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
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<3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
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<4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
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<5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-map-mask = <0xffffffff 0x0>;
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};
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};
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interrupts-extended = <&gic GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
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<&extirq 1 IRQ_TYPE_LEVEL_LOW>;
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