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In the Armada 370/XP driver, when we receive an IRQ 1, we read the list of doorbells that caused the interrupt from register ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS. This gives the list of MSIs that were generated. However, instead of acknowledging only the MSIs that were generated, we acknowledge *all* the MSIs, by writing ~MSI_DOORBELL_MASK in the ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS register. This creates a race condition: if a new MSI that isn't part of the ones read into the temporary "msimask" variable is fired before we acknowledge all MSIs, then we will simply loose it. It is important to mention that this ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS register has the following behavior: "A CPU write of 0 clears the bits in this field. A CPU write of 1 has no effect". This is what allows us to simply write ~msimask to acknoledge the handled MSIs. Notice that the same problem is present in the IPI implementation, but it is fixed as a separate patch, so that this IPI fix can be pushed to older stable versions as appropriate (all the way to 3.8), while the MSI code only appeared in 3.13. Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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| .. | ||
| exynos-combiner.c | ||
| irq-armada-370-xp.c | ||
| irq-bcm2835.c | ||
| irq-gic.c | ||
| irq-imgpdc.c | ||
| irq-metag-ext.c | ||
| irq-metag.c | ||
| irq-mmp.c | ||
| irq-moxart.c | ||
| irq-mxs.c | ||
| irq-nvic.c | ||
| irq-orion.c | ||
| irq-renesas-intc-irqpin.c | ||
| irq-renesas-irqc.c | ||
| irq-s3c24xx.c | ||
| irq-sirfsoc.c | ||
| irq-sun4i.c | ||
| irq-tb10x.c | ||
| irq-versatile-fpga.c | ||
| irq-vic.c | ||
| irq-vt8500.c | ||
| irqchip.c | ||
| irqchip.h | ||
| Kconfig | ||
| Makefile | ||
| spear-shirq.c | ||