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4efd417f29
Machine generations up to z9 (released in May 2006) have been officially out of service for several years now (z9 end of service - January 31, 2019). No distributions build kernels supporting those old machine generations anymore, except Debian, which seems to pick the oldest supported generation. The team supporting Debian on s390 has been notified about the change. Raising minimum supported machine generation to z10 helps to reduce maintenance cost and effectively remove code, which is not getting enough testing coverage due to lack of older hardware and distributions support. Besides that this unblocks some optimization opportunities and allows to use wider instruction set in asm files for future features implementation. Due to this change spectre mitigation and usercopy implementations could be drastically simplified and many newer instructions could be converted from ".insn" encoding to instruction names. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
384 lines
9.6 KiB
C
384 lines
9.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 1999,2013
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*
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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*
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* The description below was taken in large parts from the powerpc
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* bitops header file:
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* Within a word, bits are numbered LSB first. Lot's of places make
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* this assumption by directly testing bits with (val & (1<<nr)).
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* This can cause confusion for large (> 1 word) bitmaps on a
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* big-endian system because, unlike little endian, the number of each
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* bit depends on the word size.
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*
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* The bitop functions are defined to work on unsigned longs, so the bits
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* end up numbered:
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* |63..............0|127............64|191...........128|255...........192|
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*
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* We also have special functions which work with an MSB0 encoding.
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* The bits are numbered:
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* |0..............63|64............127|128...........191|192...........255|
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*
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* The main difference is that bit 0-63 in the bit number field needs to be
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* reversed compared to the LSB0 encoded bit fields. This can be achieved by
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* XOR with 0x3f.
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*
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*/
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#ifndef _S390_BITOPS_H
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#define _S390_BITOPS_H
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#include <linux/typecheck.h>
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <asm/atomic_ops.h>
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#include <asm/barrier.h>
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#define __BITOPS_WORDS(bits) (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG)
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static inline unsigned long *
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__bitops_word(unsigned long nr, const volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = (unsigned long)ptr + ((nr ^ (nr & (BITS_PER_LONG - 1))) >> 3);
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return (unsigned long *)addr;
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}
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static inline unsigned long __bitops_mask(unsigned long nr)
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{
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return 1UL << (nr & (BITS_PER_LONG - 1));
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}
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static __always_inline void arch_set_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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__atomic64_or(mask, (long *)addr);
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}
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static __always_inline void arch_clear_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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__atomic64_and(~mask, (long *)addr);
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}
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static __always_inline void arch_change_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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__atomic64_xor(mask, (long *)addr);
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}
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static inline bool arch_test_and_set_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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unsigned long old;
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old = __atomic64_or_barrier(mask, (long *)addr);
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return old & mask;
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}
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static inline bool arch_test_and_clear_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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unsigned long old;
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old = __atomic64_and_barrier(~mask, (long *)addr);
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return old & mask;
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}
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static inline bool arch_test_and_change_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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unsigned long old;
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old = __atomic64_xor_barrier(mask, (long *)addr);
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return old & mask;
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}
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static inline void arch___set_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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*addr |= mask;
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}
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static inline void arch___clear_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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*addr &= ~mask;
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}
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static inline void arch___change_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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*addr ^= mask;
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}
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static inline bool arch___test_and_set_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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unsigned long old;
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old = *addr;
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*addr |= mask;
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return old & mask;
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}
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static inline bool arch___test_and_clear_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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unsigned long old;
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old = *addr;
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*addr &= ~mask;
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return old & mask;
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}
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static inline bool arch___test_and_change_bit(unsigned long nr,
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volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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unsigned long old;
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old = *addr;
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*addr ^= mask;
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return old & mask;
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}
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static inline bool arch_test_bit(unsigned long nr,
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const volatile unsigned long *ptr)
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{
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const volatile unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask = __bitops_mask(nr);
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return *addr & mask;
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}
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static inline bool arch_test_and_set_bit_lock(unsigned long nr,
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volatile unsigned long *ptr)
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{
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if (arch_test_bit(nr, ptr))
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return true;
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return arch_test_and_set_bit(nr, ptr);
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}
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static inline void arch_clear_bit_unlock(unsigned long nr,
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volatile unsigned long *ptr)
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{
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smp_mb__before_atomic();
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arch_clear_bit(nr, ptr);
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}
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static inline void arch___clear_bit_unlock(unsigned long nr,
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volatile unsigned long *ptr)
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{
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smp_mb();
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arch___clear_bit(nr, ptr);
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}
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#include <asm-generic/bitops/instrumented-atomic.h>
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#include <asm-generic/bitops/instrumented-non-atomic.h>
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#include <asm-generic/bitops/instrumented-lock.h>
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/*
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* Functions which use MSB0 bit numbering.
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* The bits are numbered:
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* |0..............63|64............127|128...........191|192...........255|
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*/
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unsigned long find_first_bit_inv(const unsigned long *addr, unsigned long size);
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unsigned long find_next_bit_inv(const unsigned long *addr, unsigned long size,
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unsigned long offset);
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#define for_each_set_bit_inv(bit, addr, size) \
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for ((bit) = find_first_bit_inv((addr), (size)); \
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(bit) < (size); \
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(bit) = find_next_bit_inv((addr), (size), (bit) + 1))
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static inline void set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline void clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline bool test_and_clear_bit_inv(unsigned long nr,
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volatile unsigned long *ptr)
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{
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return test_and_clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline void __set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return __set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline void __clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return __clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline bool test_bit_inv(unsigned long nr,
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const volatile unsigned long *ptr)
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{
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return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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/**
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* __flogr - find leftmost one
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* @word - The word to search
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*
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* Returns the bit number of the most significant bit set,
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* where the most significant bit has bit number 0.
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* If no bit is set this function returns 64.
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*/
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static inline unsigned char __flogr(unsigned long word)
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{
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if (__builtin_constant_p(word)) {
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unsigned long bit = 0;
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if (!word)
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return 64;
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if (!(word & 0xffffffff00000000UL)) {
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word <<= 32;
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bit += 32;
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}
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if (!(word & 0xffff000000000000UL)) {
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word <<= 16;
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bit += 16;
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}
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if (!(word & 0xff00000000000000UL)) {
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word <<= 8;
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bit += 8;
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}
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if (!(word & 0xf000000000000000UL)) {
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word <<= 4;
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bit += 4;
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}
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if (!(word & 0xc000000000000000UL)) {
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word <<= 2;
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bit += 2;
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}
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if (!(word & 0x8000000000000000UL)) {
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word <<= 1;
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bit += 1;
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}
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return bit;
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} else {
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union register_pair rp;
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rp.even = word;
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asm volatile(
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" flogr %[rp],%[rp]\n"
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: [rp] "+d" (rp.pair) : : "cc");
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return rp.even;
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}
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}
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/**
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* __ffs - find first bit in word.
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* @word: The word to search
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*
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* Undefined if no bit exists, so code should check against 0 first.
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*/
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static inline unsigned long __ffs(unsigned long word)
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{
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return __flogr(-word & word) ^ (BITS_PER_LONG - 1);
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}
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/**
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* ffs - find first bit set
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* @word: the word to search
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*
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* This is defined the same way as the libc and
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* compiler builtin ffs routines (man ffs).
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*/
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static inline int ffs(int word)
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{
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unsigned long mask = 2 * BITS_PER_LONG - 1;
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unsigned int val = (unsigned int)word;
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return (1 + (__flogr(-val & val) ^ (BITS_PER_LONG - 1))) & mask;
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}
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/**
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* __fls - find last (most-significant) set bit in a long word
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* @word: the word to search
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*
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* Undefined if no set bit exists, so code should check against 0 first.
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*/
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static inline unsigned long __fls(unsigned long word)
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{
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return __flogr(word) ^ (BITS_PER_LONG - 1);
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}
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/**
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* fls64 - find last set bit in a 64-bit word
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* @word: the word to search
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*
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* This is defined in a similar way as the libc and compiler builtin
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* ffsll, but returns the position of the most significant set bit.
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*
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* fls64(value) returns 0 if value is 0 or the position of the last
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* set bit if value is nonzero. The last (most significant) bit is
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* at position 64.
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*/
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static inline int fls64(unsigned long word)
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{
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unsigned long mask = 2 * BITS_PER_LONG - 1;
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return (1 + (__flogr(word) ^ (BITS_PER_LONG - 1))) & mask;
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}
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/**
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* fls - find last (most-significant) bit set
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* @word: the word to search
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*
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* This is defined the same way as ffs.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static inline int fls(unsigned int word)
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{
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return fls64(word);
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}
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#include <asm-generic/bitops/ffz.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/le.h>
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#include <asm-generic/bitops/ext2-atomic-setbit.h>
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#endif /* _S390_BITOPS_H */
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