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97a29d59fc
The problem in
commit fea80311a9
Author: Randy Dunlap <rdunlap@xenotime.net>
Date: Sun Jul 24 11:39:14 2011 -0700
iomap: make IOPORT/PCI mapping functions conditional
is that if your architecture supplies pci_iomap/pci_iounmap, it expects
always to supply them. Adding empty body defitions in the !CONFIG_PCI
case, which is what this patch does, breaks the parisc compile because
the functions become doubly defined. It took us a while to spot this,
because we don't actually build !CONFIG_PCI very often (only if someone
is brave enough to test the snake/asp machines).
Since the note in the commit log says this is to fix a
CONFIG_GENERIC_IOMAP issue (which it does because CONFIG_GENERIC_IOMAP
supplies pci_iounmap only if CONFIG_PCI is set), there should actually
have been a condition upon this. This should make sure no other
architecture's !CONFIG_PCI compile breaks in the same way as parisc.
The fix had to be updated to take account of the GENERIC_PCI_IOMAP
separation.
Reported-by: Rolf Eike Beer <eike@sf-mail.de>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
82 lines
2.8 KiB
C
82 lines
2.8 KiB
C
#ifndef __GENERIC_IO_H
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#define __GENERIC_IO_H
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#include <linux/linkage.h>
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#include <asm/byteorder.h>
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/*
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* These are the "generic" interfaces for doing new-style
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* memory-mapped or PIO accesses. Architectures may do
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* their own arch-optimized versions, these just act as
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* wrappers around the old-style IO register access functions:
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* read[bwl]/write[bwl]/in[bwl]/out[bwl]
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*
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* Don't include this directly, include it from <asm/io.h>.
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*/
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/*
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* Read/write from/to an (offsettable) iomem cookie. It might be a PIO
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* access or a MMIO access, these functions don't care. The info is
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* encoded in the hardware mapping set up by the mapping functions
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* (or the cookie itself, depending on implementation and hw).
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*
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* The generic routines just encode the PIO/MMIO as part of the
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* cookie, and coldly assume that the MMIO IO mappings are not
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* in the low address range. Architectures for which this is not
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* true can't use this generic implementation.
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*/
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extern unsigned int ioread8(void __iomem *);
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extern unsigned int ioread16(void __iomem *);
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extern unsigned int ioread16be(void __iomem *);
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extern unsigned int ioread32(void __iomem *);
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extern unsigned int ioread32be(void __iomem *);
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extern void iowrite8(u8, void __iomem *);
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extern void iowrite16(u16, void __iomem *);
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extern void iowrite16be(u16, void __iomem *);
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extern void iowrite32(u32, void __iomem *);
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extern void iowrite32be(u32, void __iomem *);
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/*
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* "string" versions of the above. Note that they
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* use native byte ordering for the accesses (on
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* the assumption that IO and memory agree on a
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* byte order, and CPU byteorder is irrelevant).
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*
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* They do _not_ update the port address. If you
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* want MMIO that copies stuff laid out in MMIO
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* memory across multiple ports, use "memcpy_toio()"
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* and friends.
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*/
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extern void ioread8_rep(void __iomem *port, void *buf, unsigned long count);
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extern void ioread16_rep(void __iomem *port, void *buf, unsigned long count);
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extern void ioread32_rep(void __iomem *port, void *buf, unsigned long count);
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extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
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extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
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extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
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#ifdef CONFIG_HAS_IOPORT
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/* Create a virtual mapping cookie for an IO port range */
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extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
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extern void ioport_unmap(void __iomem *);
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#endif
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#ifndef ARCH_HAS_IOREMAP_WC
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#define ioremap_wc ioremap_nocache
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#endif
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#ifdef CONFIG_PCI
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/* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
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struct pci_dev;
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extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
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#elif defined(CONFIG_GENERIC_IOMAP)
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struct pci_dev;
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static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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{ }
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#endif
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#include <asm-generic/pci_iomap.h>
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#endif
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