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c76acec6d5
Implement IPv4 over IEEE 1394 as per RFC 2734 for the newer firewire stack. This feature has only been present in the older ieee1394 stack via the eth1394 driver. Still to do: - fix ipv4_priv and ipv4_node lifetime logic - fix determination of speeds and max payloads - fix bus reset handling - fix unaligned memory accesses - fix coding style - further testing/ improvement of fragment reassembly - perhaps multicast support Signed-off-by: Jay Fenlason <fenlason@redhat.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> (rebased, copyright note, changelog)
337 lines
8.8 KiB
C
337 lines
8.8 KiB
C
/*
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* Isochronous I/O functionality:
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* - Isochronous DMA context management
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* - Isochronous bus resource management (channels, bandwidth), client side
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*
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* Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/errno.h>
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#include <linux/firewire.h>
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#include <linux/firewire-constants.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <linux/vmalloc.h>
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#include <asm/byteorder.h>
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#include "core.h"
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/*
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* Isochronous DMA context management
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*/
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int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,
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int page_count, enum dma_data_direction direction)
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{
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int i, j;
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dma_addr_t address;
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buffer->page_count = page_count;
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buffer->direction = direction;
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buffer->pages = kmalloc(page_count * sizeof(buffer->pages[0]),
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GFP_KERNEL);
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if (buffer->pages == NULL)
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goto out;
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for (i = 0; i < buffer->page_count; i++) {
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buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
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if (buffer->pages[i] == NULL)
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goto out_pages;
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address = dma_map_page(card->device, buffer->pages[i],
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0, PAGE_SIZE, direction);
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if (dma_mapping_error(card->device, address)) {
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__free_page(buffer->pages[i]);
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goto out_pages;
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}
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set_page_private(buffer->pages[i], address);
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}
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return 0;
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out_pages:
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for (j = 0; j < i; j++) {
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address = page_private(buffer->pages[j]);
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dma_unmap_page(card->device, address,
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PAGE_SIZE, DMA_TO_DEVICE);
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__free_page(buffer->pages[j]);
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}
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kfree(buffer->pages);
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out:
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buffer->pages = NULL;
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return -ENOMEM;
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}
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EXPORT_SYMBOL(fw_iso_buffer_init);
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int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma)
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{
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unsigned long uaddr;
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int i, err;
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uaddr = vma->vm_start;
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for (i = 0; i < buffer->page_count; i++) {
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err = vm_insert_page(vma, uaddr, buffer->pages[i]);
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if (err)
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return err;
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uaddr += PAGE_SIZE;
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}
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return 0;
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}
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void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,
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struct fw_card *card)
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{
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int i;
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dma_addr_t address;
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for (i = 0; i < buffer->page_count; i++) {
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address = page_private(buffer->pages[i]);
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dma_unmap_page(card->device, address,
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PAGE_SIZE, DMA_TO_DEVICE);
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__free_page(buffer->pages[i]);
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}
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kfree(buffer->pages);
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buffer->pages = NULL;
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}
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EXPORT_SYMBOL(fw_iso_buffer_destroy);
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struct fw_iso_context *fw_iso_context_create(struct fw_card *card,
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int type, int channel, int speed, size_t header_size,
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fw_iso_callback_t callback, void *callback_data)
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{
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struct fw_iso_context *ctx;
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ctx = card->driver->allocate_iso_context(card,
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type, channel, header_size);
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if (IS_ERR(ctx))
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return ctx;
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ctx->card = card;
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ctx->type = type;
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ctx->channel = channel;
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ctx->speed = speed;
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ctx->header_size = header_size;
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ctx->callback = callback;
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ctx->callback_data = callback_data;
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return ctx;
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}
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EXPORT_SYMBOL(fw_iso_context_create);
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void fw_iso_context_destroy(struct fw_iso_context *ctx)
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{
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struct fw_card *card = ctx->card;
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card->driver->free_iso_context(ctx);
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}
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EXPORT_SYMBOL(fw_iso_context_destroy);
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int fw_iso_context_start(struct fw_iso_context *ctx,
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int cycle, int sync, int tags)
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{
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return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
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}
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EXPORT_SYMBOL(fw_iso_context_start);
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int fw_iso_context_queue(struct fw_iso_context *ctx,
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struct fw_iso_packet *packet,
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struct fw_iso_buffer *buffer,
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unsigned long payload)
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{
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struct fw_card *card = ctx->card;
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return card->driver->queue_iso(ctx, packet, buffer, payload);
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}
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EXPORT_SYMBOL(fw_iso_context_queue);
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int fw_iso_context_stop(struct fw_iso_context *ctx)
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{
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return ctx->card->driver->stop_iso(ctx);
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}
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EXPORT_SYMBOL(fw_iso_context_stop);
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/*
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* Isochronous bus resource management (channels, bandwidth), client side
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*/
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static int manage_bandwidth(struct fw_card *card, int irm_id, int generation,
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int bandwidth, bool allocate)
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{
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__be32 data[2];
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int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0;
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/*
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* On a 1394a IRM with low contention, try < 1 is enough.
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* On a 1394-1995 IRM, we need at least try < 2.
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* Let's just do try < 5.
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*/
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for (try = 0; try < 5; try++) {
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new = allocate ? old - bandwidth : old + bandwidth;
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if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL)
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break;
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data[0] = cpu_to_be32(old);
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data[1] = cpu_to_be32(new);
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switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
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irm_id, generation, SCODE_100,
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CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE,
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data, sizeof(data))) {
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case RCODE_GENERATION:
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/* A generation change frees all bandwidth. */
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return allocate ? -EAGAIN : bandwidth;
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case RCODE_COMPLETE:
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if (be32_to_cpup(data) == old)
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return bandwidth;
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old = be32_to_cpup(data);
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/* Fall through. */
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}
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}
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return -EIO;
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}
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static int manage_channel(struct fw_card *card, int irm_id, int generation,
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u32 channels_mask, u64 offset, bool allocate)
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{
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__be32 data[2], c, all, old;
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int i, retry = 5;
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old = all = allocate ? cpu_to_be32(~0) : 0;
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for (i = 0; i < 32; i++) {
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if (!(channels_mask & 1 << i))
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continue;
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c = cpu_to_be32(1 << (31 - i));
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if ((old & c) != (all & c))
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continue;
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data[0] = old;
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data[1] = old ^ c;
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switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
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irm_id, generation, SCODE_100,
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offset, data, sizeof(data))) {
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case RCODE_GENERATION:
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/* A generation change frees all channels. */
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return allocate ? -EAGAIN : i;
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case RCODE_COMPLETE:
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if (data[0] == old)
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return i;
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old = data[0];
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/* Is the IRM 1394a-2000 compliant? */
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if ((data[0] & c) == (data[1] & c))
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continue;
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/* 1394-1995 IRM, fall through to retry. */
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default:
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if (retry--)
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i--;
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}
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}
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return -EIO;
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}
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static void deallocate_channel(struct fw_card *card, int irm_id,
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int generation, int channel)
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{
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u32 mask;
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u64 offset;
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mask = channel < 32 ? 1 << channel : 1 << (channel - 32);
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offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI :
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CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO;
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manage_channel(card, irm_id, generation, mask, offset, false);
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}
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/**
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* fw_iso_resource_manage - Allocate or deallocate a channel and/or bandwidth
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*
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* In parameters: card, generation, channels_mask, bandwidth, allocate
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* Out parameters: channel, bandwidth
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* This function blocks (sleeps) during communication with the IRM.
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*
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* Allocates or deallocates at most one channel out of channels_mask.
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* channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0.
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* (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for
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* channel 0 and LSB for channel 63.)
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* Allocates or deallocates as many bandwidth allocation units as specified.
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*
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* Returns channel < 0 if no channel was allocated or deallocated.
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* Returns bandwidth = 0 if no bandwidth was allocated or deallocated.
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*
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* If generation is stale, deallocations succeed but allocations fail with
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* channel = -EAGAIN.
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*
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* If channel allocation fails, no bandwidth will be allocated either.
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* If bandwidth allocation fails, no channel will be allocated either.
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* But deallocations of channel and bandwidth are tried independently
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* of each other's success.
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*/
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void fw_iso_resource_manage(struct fw_card *card, int generation,
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u64 channels_mask, int *channel, int *bandwidth,
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bool allocate)
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{
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u32 channels_hi = channels_mask; /* channels 31...0 */
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u32 channels_lo = channels_mask >> 32; /* channels 63...32 */
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int irm_id, ret, c = -EINVAL;
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spin_lock_irq(&card->lock);
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irm_id = card->irm_node->node_id;
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spin_unlock_irq(&card->lock);
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if (channels_hi)
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c = manage_channel(card, irm_id, generation, channels_hi,
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CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI, allocate);
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if (channels_lo && c < 0) {
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c = manage_channel(card, irm_id, generation, channels_lo,
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CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO, allocate);
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if (c >= 0)
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c += 32;
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}
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*channel = c;
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if (allocate && channels_mask != 0 && c < 0)
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*bandwidth = 0;
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if (*bandwidth == 0)
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return;
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ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate);
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if (ret < 0)
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*bandwidth = 0;
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if (allocate && ret < 0 && c >= 0) {
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deallocate_channel(card, irm_id, generation, c);
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*channel = ret;
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}
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}
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