mirror of
https://github.com/torvalds/linux.git
synced 2024-11-23 04:31:50 +00:00
c6e6c96d8f
Add a new style driver for the clock control unit in Allwinner A31/A31s.
A few clocks are still missing:
- MIPI PLL's HDMI mode support
- EMAC clock
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
76 lines
1.1 KiB
Plaintext
76 lines
1.1 KiB
Plaintext
config SUNXI_CCU
|
|
bool "Clock support for Allwinner SoCs"
|
|
default ARCH_SUNXI
|
|
|
|
if SUNXI_CCU
|
|
|
|
# Base clock types
|
|
|
|
config SUNXI_CCU_DIV
|
|
bool
|
|
select SUNXI_CCU_MUX
|
|
|
|
config SUNXI_CCU_FRAC
|
|
bool
|
|
|
|
config SUNXI_CCU_GATE
|
|
bool
|
|
|
|
config SUNXI_CCU_MUX
|
|
bool
|
|
|
|
config SUNXI_CCU_PHASE
|
|
bool
|
|
|
|
# Multi-factor clocks
|
|
|
|
config SUNXI_CCU_NK
|
|
bool
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_NKM
|
|
bool
|
|
select RATIONAL
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_NKMP
|
|
bool
|
|
select RATIONAL
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_NM
|
|
bool
|
|
select RATIONAL
|
|
select SUNXI_CCU_FRAC
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_MP
|
|
bool
|
|
select SUNXI_CCU_GATE
|
|
select SUNXI_CCU_MUX
|
|
|
|
# SoC Drivers
|
|
|
|
config SUN6I_A31_CCU
|
|
bool "Support for the Allwinner A31/A31s CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN6I
|
|
|
|
config SUN8I_H3_CCU
|
|
bool "Support for the Allwinner H3 CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NKMP
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN8I
|
|
|
|
endif
|