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The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB controller and can reuse the existing Exynos glue. Add the google,gs101-dwusb3 compatible and associated driver data. Four clocks are required for USB for this SoC: * bus clock * suspend clock * Link interface AXI clock * Link interface APB clock Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240423-usb-dwc3-gs101-v1-2-2f331f88203f@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
259 lines
6.1 KiB
C
259 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* dwc3-exynos.c - Samsung Exynos DWC3 Specific Glue layer
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/regulator/consumer.h>
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#define DWC3_EXYNOS_MAX_CLOCKS 4
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struct dwc3_exynos_driverdata {
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const char *clk_names[DWC3_EXYNOS_MAX_CLOCKS];
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int num_clks;
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int suspend_clk_idx;
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};
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struct dwc3_exynos {
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struct device *dev;
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const char **clk_names;
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struct clk *clks[DWC3_EXYNOS_MAX_CLOCKS];
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int num_clks;
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int suspend_clk_idx;
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struct regulator *vdd33;
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struct regulator *vdd10;
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};
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static int dwc3_exynos_probe(struct platform_device *pdev)
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{
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struct dwc3_exynos *exynos;
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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const struct dwc3_exynos_driverdata *driver_data;
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int i, ret;
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exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
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if (!exynos)
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return -ENOMEM;
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driver_data = of_device_get_match_data(dev);
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exynos->dev = dev;
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exynos->num_clks = driver_data->num_clks;
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exynos->clk_names = (const char **)driver_data->clk_names;
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exynos->suspend_clk_idx = driver_data->suspend_clk_idx;
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platform_set_drvdata(pdev, exynos);
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for (i = 0; i < exynos->num_clks; i++) {
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exynos->clks[i] = devm_clk_get(dev, exynos->clk_names[i]);
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if (IS_ERR(exynos->clks[i])) {
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dev_err(dev, "failed to get clock: %s\n",
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exynos->clk_names[i]);
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return PTR_ERR(exynos->clks[i]);
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}
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}
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for (i = 0; i < exynos->num_clks; i++) {
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ret = clk_prepare_enable(exynos->clks[i]);
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if (ret) {
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while (i-- > 0)
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clk_disable_unprepare(exynos->clks[i]);
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return ret;
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}
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}
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if (exynos->suspend_clk_idx >= 0)
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clk_prepare_enable(exynos->clks[exynos->suspend_clk_idx]);
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exynos->vdd33 = devm_regulator_get(dev, "vdd33");
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if (IS_ERR(exynos->vdd33)) {
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ret = PTR_ERR(exynos->vdd33);
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goto vdd33_err;
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}
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ret = regulator_enable(exynos->vdd33);
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if (ret) {
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dev_err(dev, "Failed to enable VDD33 supply\n");
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goto vdd33_err;
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}
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exynos->vdd10 = devm_regulator_get(dev, "vdd10");
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if (IS_ERR(exynos->vdd10)) {
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ret = PTR_ERR(exynos->vdd10);
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goto vdd10_err;
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}
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ret = regulator_enable(exynos->vdd10);
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if (ret) {
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dev_err(dev, "Failed to enable VDD10 supply\n");
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goto vdd10_err;
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}
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if (node) {
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ret = of_platform_populate(node, NULL, NULL, dev);
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if (ret) {
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dev_err(dev, "failed to add dwc3 core\n");
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goto populate_err;
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}
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} else {
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dev_err(dev, "no device node, failed to add dwc3 core\n");
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ret = -ENODEV;
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goto populate_err;
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}
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return 0;
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populate_err:
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regulator_disable(exynos->vdd10);
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vdd10_err:
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regulator_disable(exynos->vdd33);
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vdd33_err:
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for (i = exynos->num_clks - 1; i >= 0; i--)
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clk_disable_unprepare(exynos->clks[i]);
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if (exynos->suspend_clk_idx >= 0)
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clk_disable_unprepare(exynos->clks[exynos->suspend_clk_idx]);
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return ret;
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}
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static void dwc3_exynos_remove(struct platform_device *pdev)
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{
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struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
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int i;
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of_platform_depopulate(&pdev->dev);
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for (i = exynos->num_clks - 1; i >= 0; i--)
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clk_disable_unprepare(exynos->clks[i]);
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if (exynos->suspend_clk_idx >= 0)
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clk_disable_unprepare(exynos->clks[exynos->suspend_clk_idx]);
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regulator_disable(exynos->vdd33);
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regulator_disable(exynos->vdd10);
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}
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static const struct dwc3_exynos_driverdata exynos5250_drvdata = {
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.clk_names = { "usbdrd30" },
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.num_clks = 1,
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.suspend_clk_idx = -1,
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};
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static const struct dwc3_exynos_driverdata exynos5433_drvdata = {
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.clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" },
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.num_clks = 4,
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.suspend_clk_idx = 1,
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};
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static const struct dwc3_exynos_driverdata exynos7_drvdata = {
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.clk_names = { "usbdrd30", "usbdrd30_susp_clk", "usbdrd30_axius_clk" },
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.num_clks = 3,
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.suspend_clk_idx = 1,
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};
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static const struct dwc3_exynos_driverdata exynos850_drvdata = {
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.clk_names = { "bus_early", "ref" },
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.num_clks = 2,
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.suspend_clk_idx = -1,
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};
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static const struct dwc3_exynos_driverdata gs101_drvdata = {
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.clk_names = { "bus_early", "susp_clk", "link_aclk", "link_pclk" },
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.num_clks = 4,
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.suspend_clk_idx = 1,
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};
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static const struct of_device_id exynos_dwc3_match[] = {
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{
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.compatible = "samsung,exynos5250-dwusb3",
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.data = &exynos5250_drvdata,
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}, {
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.compatible = "samsung,exynos5433-dwusb3",
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.data = &exynos5433_drvdata,
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}, {
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.compatible = "samsung,exynos7-dwusb3",
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.data = &exynos7_drvdata,
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}, {
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.compatible = "samsung,exynos850-dwusb3",
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.data = &exynos850_drvdata,
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}, {
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.compatible = "google,gs101-dwusb3",
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.data = &gs101_drvdata,
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}, {
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}
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};
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MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
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static int dwc3_exynos_suspend(struct device *dev)
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{
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struct dwc3_exynos *exynos = dev_get_drvdata(dev);
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int i;
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for (i = exynos->num_clks - 1; i >= 0; i--)
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clk_disable_unprepare(exynos->clks[i]);
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regulator_disable(exynos->vdd33);
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regulator_disable(exynos->vdd10);
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return 0;
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}
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static int dwc3_exynos_resume(struct device *dev)
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{
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struct dwc3_exynos *exynos = dev_get_drvdata(dev);
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int i, ret;
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ret = regulator_enable(exynos->vdd33);
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if (ret) {
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dev_err(dev, "Failed to enable VDD33 supply\n");
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return ret;
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}
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ret = regulator_enable(exynos->vdd10);
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if (ret) {
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dev_err(dev, "Failed to enable VDD10 supply\n");
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return ret;
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}
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for (i = 0; i < exynos->num_clks; i++) {
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ret = clk_prepare_enable(exynos->clks[i]);
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if (ret) {
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while (i-- > 0)
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clk_disable_unprepare(exynos->clks[i]);
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return ret;
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}
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}
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return 0;
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}
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static DEFINE_SIMPLE_DEV_PM_OPS(dwc3_exynos_dev_pm_ops,
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dwc3_exynos_suspend, dwc3_exynos_resume);
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static struct platform_driver dwc3_exynos_driver = {
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.probe = dwc3_exynos_probe,
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.remove_new = dwc3_exynos_remove,
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.driver = {
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.name = "exynos-dwc3",
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.of_match_table = exynos_dwc3_match,
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.pm = pm_sleep_ptr(&dwc3_exynos_dev_pm_ops),
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},
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};
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module_platform_driver(dwc3_exynos_driver);
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MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("DesignWare USB3 Exynos Glue Layer");
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