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62faca1ca1
Include a test case to validate the XTILEDATA injection to the target. Also, it ensures the kernel's ability to copy states between different XSAVE formats. Refactor the memcmp() code to be usable for the state validation. Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/all/20230227210504.18520-3-chang.seok.bae%40intel.com
956 lines
22 KiB
C
956 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#define _GNU_SOURCE
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#include <err.h>
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#include <errno.h>
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#include <pthread.h>
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#include <setjmp.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <x86intrin.h>
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#include <sys/auxv.h>
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#include <sys/mman.h>
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#include <sys/shm.h>
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#include <sys/ptrace.h>
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#include <sys/syscall.h>
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#include <sys/wait.h>
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#include <sys/uio.h>
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#include "../kselftest.h" /* For __cpuid_count() */
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#ifndef __x86_64__
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# error This test is 64-bit only
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#endif
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#define XSAVE_HDR_OFFSET 512
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#define XSAVE_HDR_SIZE 64
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struct xsave_buffer {
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union {
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struct {
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char legacy[XSAVE_HDR_OFFSET];
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char header[XSAVE_HDR_SIZE];
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char extended[0];
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};
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char bytes[0];
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};
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};
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static inline uint64_t xgetbv(uint32_t index)
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{
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uint32_t eax, edx;
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asm volatile("xgetbv;"
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: "=a" (eax), "=d" (edx)
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: "c" (index));
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return eax + ((uint64_t)edx << 32);
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}
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static inline void xsave(struct xsave_buffer *xbuf, uint64_t rfbm)
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{
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uint32_t rfbm_lo = rfbm;
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uint32_t rfbm_hi = rfbm >> 32;
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asm volatile("xsave (%%rdi)"
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: : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi)
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: "memory");
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}
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static inline void xrstor(struct xsave_buffer *xbuf, uint64_t rfbm)
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{
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uint32_t rfbm_lo = rfbm;
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uint32_t rfbm_hi = rfbm >> 32;
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asm volatile("xrstor (%%rdi)"
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: : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi));
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}
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/* err() exits and will not return */
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#define fatal_error(msg, ...) err(1, "[FAIL]\t" msg, ##__VA_ARGS__)
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static void sethandler(int sig, void (*handler)(int, siginfo_t *, void *),
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int flags)
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{
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struct sigaction sa;
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = handler;
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sa.sa_flags = SA_SIGINFO | flags;
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sigemptyset(&sa.sa_mask);
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if (sigaction(sig, &sa, 0))
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fatal_error("sigaction");
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}
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static void clearhandler(int sig)
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{
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struct sigaction sa;
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memset(&sa, 0, sizeof(sa));
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sa.sa_handler = SIG_DFL;
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sigemptyset(&sa.sa_mask);
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if (sigaction(sig, &sa, 0))
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fatal_error("sigaction");
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}
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#define XFEATURE_XTILECFG 17
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#define XFEATURE_XTILEDATA 18
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#define XFEATURE_MASK_XTILECFG (1 << XFEATURE_XTILECFG)
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#define XFEATURE_MASK_XTILEDATA (1 << XFEATURE_XTILEDATA)
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#define XFEATURE_MASK_XTILE (XFEATURE_MASK_XTILECFG | XFEATURE_MASK_XTILEDATA)
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#define CPUID_LEAF1_ECX_XSAVE_MASK (1 << 26)
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#define CPUID_LEAF1_ECX_OSXSAVE_MASK (1 << 27)
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static inline void check_cpuid_xsave(void)
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{
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uint32_t eax, ebx, ecx, edx;
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/*
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* CPUID.1:ECX.XSAVE[bit 26] enumerates general
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* support for the XSAVE feature set, including
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* XGETBV.
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*/
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__cpuid_count(1, 0, eax, ebx, ecx, edx);
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if (!(ecx & CPUID_LEAF1_ECX_XSAVE_MASK))
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fatal_error("cpuid: no CPU xsave support");
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if (!(ecx & CPUID_LEAF1_ECX_OSXSAVE_MASK))
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fatal_error("cpuid: no OS xsave support");
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}
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static uint32_t xbuf_size;
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static struct {
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uint32_t xbuf_offset;
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uint32_t size;
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} xtiledata;
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#define CPUID_LEAF_XSTATE 0xd
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#define CPUID_SUBLEAF_XSTATE_USER 0x0
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#define TILE_CPUID 0x1d
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#define TILE_PALETTE_ID 0x1
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static void check_cpuid_xtiledata(void)
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{
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uint32_t eax, ebx, ecx, edx;
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__cpuid_count(CPUID_LEAF_XSTATE, CPUID_SUBLEAF_XSTATE_USER,
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eax, ebx, ecx, edx);
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/*
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* EBX enumerates the size (in bytes) required by the XSAVE
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* instruction for an XSAVE area containing all the user state
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* components corresponding to bits currently set in XCR0.
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*
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* Stash that off so it can be used to allocate buffers later.
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*/
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xbuf_size = ebx;
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__cpuid_count(CPUID_LEAF_XSTATE, XFEATURE_XTILEDATA,
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eax, ebx, ecx, edx);
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/*
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* eax: XTILEDATA state component size
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* ebx: XTILEDATA state component offset in user buffer
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*/
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if (!eax || !ebx)
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fatal_error("xstate cpuid: invalid tile data size/offset: %d/%d",
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eax, ebx);
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xtiledata.size = eax;
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xtiledata.xbuf_offset = ebx;
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}
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/* The helpers for managing XSAVE buffer and tile states: */
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struct xsave_buffer *alloc_xbuf(void)
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{
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struct xsave_buffer *xbuf;
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/* XSAVE buffer should be 64B-aligned. */
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xbuf = aligned_alloc(64, xbuf_size);
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if (!xbuf)
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fatal_error("aligned_alloc()");
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return xbuf;
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}
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static inline void clear_xstate_header(struct xsave_buffer *buffer)
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{
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memset(&buffer->header, 0, sizeof(buffer->header));
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}
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static inline uint64_t get_xstatebv(struct xsave_buffer *buffer)
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{
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/* XSTATE_BV is at the beginning of the header: */
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return *(uint64_t *)&buffer->header;
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}
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static inline void set_xstatebv(struct xsave_buffer *buffer, uint64_t bv)
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{
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/* XSTATE_BV is at the beginning of the header: */
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*(uint64_t *)(&buffer->header) = bv;
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}
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static void set_rand_tiledata(struct xsave_buffer *xbuf)
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{
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int *ptr = (int *)&xbuf->bytes[xtiledata.xbuf_offset];
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int data;
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int i;
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/*
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* Ensure that 'data' is never 0. This ensures that
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* the registers are never in their initial configuration
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* and thus never tracked as being in the init state.
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*/
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data = rand() | 1;
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for (i = 0; i < xtiledata.size / sizeof(int); i++, ptr++)
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*ptr = data;
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}
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struct xsave_buffer *stashed_xsave;
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static void init_stashed_xsave(void)
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{
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stashed_xsave = alloc_xbuf();
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if (!stashed_xsave)
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fatal_error("failed to allocate stashed_xsave\n");
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clear_xstate_header(stashed_xsave);
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}
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static void free_stashed_xsave(void)
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{
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free(stashed_xsave);
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}
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/* See 'struct _fpx_sw_bytes' at sigcontext.h */
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#define SW_BYTES_OFFSET 464
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/* N.B. The struct's field name varies so read from the offset. */
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#define SW_BYTES_BV_OFFSET (SW_BYTES_OFFSET + 8)
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static inline struct _fpx_sw_bytes *get_fpx_sw_bytes(void *buffer)
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{
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return (struct _fpx_sw_bytes *)(buffer + SW_BYTES_OFFSET);
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}
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static inline uint64_t get_fpx_sw_bytes_features(void *buffer)
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{
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return *(uint64_t *)(buffer + SW_BYTES_BV_OFFSET);
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}
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/* Work around printf() being unsafe in signals: */
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#define SIGNAL_BUF_LEN 1000
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char signal_message_buffer[SIGNAL_BUF_LEN];
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void sig_print(char *msg)
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{
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int left = SIGNAL_BUF_LEN - strlen(signal_message_buffer) - 1;
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strncat(signal_message_buffer, msg, left);
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}
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static volatile bool noperm_signaled;
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static int noperm_errs;
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/*
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* Signal handler for when AMX is used but
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* permission has not been obtained.
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*/
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static void handle_noperm(int sig, siginfo_t *si, void *ctx_void)
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{
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ucontext_t *ctx = (ucontext_t *)ctx_void;
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void *xbuf = ctx->uc_mcontext.fpregs;
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struct _fpx_sw_bytes *sw_bytes;
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uint64_t features;
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/* Reset the signal message buffer: */
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signal_message_buffer[0] = '\0';
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sig_print("\tAt SIGILL handler,\n");
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if (si->si_code != ILL_ILLOPC) {
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noperm_errs++;
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sig_print("[FAIL]\tInvalid signal code.\n");
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} else {
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sig_print("[OK]\tValid signal code (ILL_ILLOPC).\n");
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}
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sw_bytes = get_fpx_sw_bytes(xbuf);
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/*
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* Without permission, the signal XSAVE buffer should not
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* have room for AMX register state (aka. xtiledata).
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* Check that the size does not overlap with where xtiledata
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* will reside.
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*
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* This also implies that no state components *PAST*
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* XTILEDATA (features >=19) can be present in the buffer.
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*/
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if (sw_bytes->xstate_size <= xtiledata.xbuf_offset) {
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sig_print("[OK]\tValid xstate size\n");
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} else {
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noperm_errs++;
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sig_print("[FAIL]\tInvalid xstate size\n");
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}
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features = get_fpx_sw_bytes_features(xbuf);
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/*
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* Without permission, the XTILEDATA feature
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* bit should not be set.
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*/
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if ((features & XFEATURE_MASK_XTILEDATA) == 0) {
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sig_print("[OK]\tValid xstate mask\n");
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} else {
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noperm_errs++;
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sig_print("[FAIL]\tInvalid xstate mask\n");
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}
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noperm_signaled = true;
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ctx->uc_mcontext.gregs[REG_RIP] += 3; /* Skip the faulting XRSTOR */
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}
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/* Return true if XRSTOR is successful; otherwise, false. */
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static inline bool xrstor_safe(struct xsave_buffer *xbuf, uint64_t mask)
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{
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noperm_signaled = false;
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xrstor(xbuf, mask);
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/* Print any messages produced by the signal code: */
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printf("%s", signal_message_buffer);
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/*
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* Reset the buffer to make sure any future printing
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* only outputs new messages:
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*/
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signal_message_buffer[0] = '\0';
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if (noperm_errs)
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fatal_error("saw %d errors in noperm signal handler\n", noperm_errs);
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return !noperm_signaled;
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}
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/*
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* Use XRSTOR to populate the XTILEDATA registers with
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* random data.
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*
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* Return true if successful; otherwise, false.
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*/
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static inline bool load_rand_tiledata(struct xsave_buffer *xbuf)
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{
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clear_xstate_header(xbuf);
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set_xstatebv(xbuf, XFEATURE_MASK_XTILEDATA);
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set_rand_tiledata(xbuf);
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return xrstor_safe(xbuf, XFEATURE_MASK_XTILEDATA);
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}
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/* Return XTILEDATA to its initial configuration. */
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static inline void init_xtiledata(void)
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{
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clear_xstate_header(stashed_xsave);
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xrstor_safe(stashed_xsave, XFEATURE_MASK_XTILEDATA);
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}
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enum expected_result { FAIL_EXPECTED, SUCCESS_EXPECTED };
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/* arch_prctl() and sigaltstack() test */
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#define ARCH_GET_XCOMP_PERM 0x1022
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#define ARCH_REQ_XCOMP_PERM 0x1023
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static void req_xtiledata_perm(void)
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{
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syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, XFEATURE_XTILEDATA);
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}
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static void validate_req_xcomp_perm(enum expected_result exp)
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{
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unsigned long bitmask, expected_bitmask;
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long rc;
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rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_PERM, &bitmask);
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if (rc) {
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fatal_error("prctl(ARCH_GET_XCOMP_PERM) error: %ld", rc);
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} else if (!(bitmask & XFEATURE_MASK_XTILECFG)) {
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fatal_error("ARCH_GET_XCOMP_PERM returns XFEATURE_XTILECFG off.");
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}
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rc = syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, XFEATURE_XTILEDATA);
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if (exp == FAIL_EXPECTED) {
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if (rc) {
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printf("[OK]\tARCH_REQ_XCOMP_PERM saw expected failure..\n");
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return;
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}
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fatal_error("ARCH_REQ_XCOMP_PERM saw unexpected success.\n");
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} else if (rc) {
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fatal_error("ARCH_REQ_XCOMP_PERM saw unexpected failure.\n");
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}
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expected_bitmask = bitmask | XFEATURE_MASK_XTILEDATA;
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rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_PERM, &bitmask);
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if (rc) {
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fatal_error("prctl(ARCH_GET_XCOMP_PERM) error: %ld", rc);
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} else if (bitmask != expected_bitmask) {
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fatal_error("ARCH_REQ_XCOMP_PERM set a wrong bitmask: %lx, expected: %lx.\n",
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bitmask, expected_bitmask);
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} else {
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printf("\tARCH_REQ_XCOMP_PERM is successful.\n");
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}
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}
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static void validate_xcomp_perm(enum expected_result exp)
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{
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bool load_success = load_rand_tiledata(stashed_xsave);
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if (exp == FAIL_EXPECTED) {
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if (load_success) {
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noperm_errs++;
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printf("[FAIL]\tLoad tiledata succeeded.\n");
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} else {
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printf("[OK]\tLoad tiledata failed.\n");
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}
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} else if (exp == SUCCESS_EXPECTED) {
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if (load_success) {
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printf("[OK]\tLoad tiledata succeeded.\n");
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} else {
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noperm_errs++;
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printf("[FAIL]\tLoad tiledata failed.\n");
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}
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}
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}
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#ifndef AT_MINSIGSTKSZ
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# define AT_MINSIGSTKSZ 51
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#endif
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static void *alloc_altstack(unsigned int size)
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{
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void *altstack;
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altstack = mmap(NULL, size, PROT_READ | PROT_WRITE,
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MAP_PRIVATE | MAP_ANONYMOUS | MAP_STACK, -1, 0);
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if (altstack == MAP_FAILED)
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fatal_error("mmap() for altstack");
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return altstack;
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}
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static void setup_altstack(void *addr, unsigned long size, enum expected_result exp)
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{
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stack_t ss;
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int rc;
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memset(&ss, 0, sizeof(ss));
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ss.ss_size = size;
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ss.ss_sp = addr;
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rc = sigaltstack(&ss, NULL);
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if (exp == FAIL_EXPECTED) {
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if (rc) {
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printf("[OK]\tsigaltstack() failed.\n");
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} else {
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fatal_error("sigaltstack() succeeded unexpectedly.\n");
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}
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} else if (rc) {
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fatal_error("sigaltstack()");
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}
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}
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static void test_dynamic_sigaltstack(void)
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{
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unsigned int small_size, enough_size;
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unsigned long minsigstksz;
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void *altstack;
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minsigstksz = getauxval(AT_MINSIGSTKSZ);
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printf("\tAT_MINSIGSTKSZ = %lu\n", minsigstksz);
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/*
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* getauxval() itself can return 0 for failure or
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* success. But, in this case, AT_MINSIGSTKSZ
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* will always return a >=0 value if implemented.
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* Just check for 0.
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*/
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if (minsigstksz == 0) {
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printf("no support for AT_MINSIGSTKSZ, skipping sigaltstack tests\n");
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return;
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}
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enough_size = minsigstksz * 2;
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altstack = alloc_altstack(enough_size);
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printf("\tAllocate memory for altstack (%u bytes).\n", enough_size);
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/*
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* Try setup_altstack() with a size which can not fit
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* XTILEDATA. ARCH_REQ_XCOMP_PERM should fail.
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*/
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small_size = minsigstksz - xtiledata.size;
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printf("\tAfter sigaltstack() with small size (%u bytes).\n", small_size);
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setup_altstack(altstack, small_size, SUCCESS_EXPECTED);
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validate_req_xcomp_perm(FAIL_EXPECTED);
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/*
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* Try setup_altstack() with a size derived from
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* AT_MINSIGSTKSZ. It should be more than large enough
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* and thus ARCH_REQ_XCOMP_PERM should succeed.
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*/
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printf("\tAfter sigaltstack() with enough size (%u bytes).\n", enough_size);
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setup_altstack(altstack, enough_size, SUCCESS_EXPECTED);
|
|
validate_req_xcomp_perm(SUCCESS_EXPECTED);
|
|
|
|
/*
|
|
* Try to coerce setup_altstack() to again accept a
|
|
* too-small altstack. This ensures that big-enough
|
|
* sigaltstacks can not shrink to a too-small value
|
|
* once XTILEDATA permission is established.
|
|
*/
|
|
printf("\tThen, sigaltstack() with small size (%u bytes).\n", small_size);
|
|
setup_altstack(altstack, small_size, FAIL_EXPECTED);
|
|
}
|
|
|
|
static void test_dynamic_state(void)
|
|
{
|
|
pid_t parent, child, grandchild;
|
|
|
|
parent = fork();
|
|
if (parent < 0) {
|
|
/* fork() failed */
|
|
fatal_error("fork");
|
|
} else if (parent > 0) {
|
|
int status;
|
|
/* fork() succeeded. Now in the parent. */
|
|
|
|
wait(&status);
|
|
if (!WIFEXITED(status) || WEXITSTATUS(status))
|
|
fatal_error("arch_prctl test parent exit");
|
|
return;
|
|
}
|
|
/* fork() succeeded. Now in the child . */
|
|
|
|
printf("[RUN]\tCheck ARCH_REQ_XCOMP_PERM around process fork() and sigaltack() test.\n");
|
|
|
|
printf("\tFork a child.\n");
|
|
child = fork();
|
|
if (child < 0) {
|
|
fatal_error("fork");
|
|
} else if (child > 0) {
|
|
int status;
|
|
|
|
wait(&status);
|
|
if (!WIFEXITED(status) || WEXITSTATUS(status))
|
|
fatal_error("arch_prctl test child exit");
|
|
_exit(0);
|
|
}
|
|
|
|
/*
|
|
* The permission request should fail without an
|
|
* XTILEDATA-compatible signal stack
|
|
*/
|
|
printf("\tTest XCOMP_PERM at child.\n");
|
|
validate_xcomp_perm(FAIL_EXPECTED);
|
|
|
|
/*
|
|
* Set up an XTILEDATA-compatible signal stack and
|
|
* also obtain permission to populate XTILEDATA.
|
|
*/
|
|
printf("\tTest dynamic sigaltstack at child:\n");
|
|
test_dynamic_sigaltstack();
|
|
|
|
/* Ensure that XTILEDATA can be populated. */
|
|
printf("\tTest XCOMP_PERM again at child.\n");
|
|
validate_xcomp_perm(SUCCESS_EXPECTED);
|
|
|
|
printf("\tFork a grandchild.\n");
|
|
grandchild = fork();
|
|
if (grandchild < 0) {
|
|
/* fork() failed */
|
|
fatal_error("fork");
|
|
} else if (!grandchild) {
|
|
/* fork() succeeded. Now in the (grand)child. */
|
|
printf("\tTest XCOMP_PERM at grandchild.\n");
|
|
|
|
/*
|
|
* Ensure that the grandchild inherited
|
|
* permission and a compatible sigaltstack:
|
|
*/
|
|
validate_xcomp_perm(SUCCESS_EXPECTED);
|
|
} else {
|
|
int status;
|
|
/* fork() succeeded. Now in the parent. */
|
|
|
|
wait(&status);
|
|
if (!WIFEXITED(status) || WEXITSTATUS(status))
|
|
fatal_error("fork test grandchild");
|
|
}
|
|
|
|
_exit(0);
|
|
}
|
|
|
|
static inline int __compare_tiledata_state(struct xsave_buffer *xbuf1, struct xsave_buffer *xbuf2)
|
|
{
|
|
return memcmp(&xbuf1->bytes[xtiledata.xbuf_offset],
|
|
&xbuf2->bytes[xtiledata.xbuf_offset],
|
|
xtiledata.size);
|
|
}
|
|
|
|
/*
|
|
* Save current register state and compare it to @xbuf1.'
|
|
*
|
|
* Returns false if @xbuf1 matches the registers.
|
|
* Returns true if @xbuf1 differs from the registers.
|
|
*/
|
|
static inline bool __validate_tiledata_regs(struct xsave_buffer *xbuf1)
|
|
{
|
|
struct xsave_buffer *xbuf2;
|
|
int ret;
|
|
|
|
xbuf2 = alloc_xbuf();
|
|
if (!xbuf2)
|
|
fatal_error("failed to allocate XSAVE buffer\n");
|
|
|
|
xsave(xbuf2, XFEATURE_MASK_XTILEDATA);
|
|
ret = __compare_tiledata_state(xbuf1, xbuf2);
|
|
|
|
free(xbuf2);
|
|
|
|
if (ret == 0)
|
|
return false;
|
|
return true;
|
|
}
|
|
|
|
static inline void validate_tiledata_regs_same(struct xsave_buffer *xbuf)
|
|
{
|
|
int ret = __validate_tiledata_regs(xbuf);
|
|
|
|
if (ret != 0)
|
|
fatal_error("TILEDATA registers changed");
|
|
}
|
|
|
|
static inline void validate_tiledata_regs_changed(struct xsave_buffer *xbuf)
|
|
{
|
|
int ret = __validate_tiledata_regs(xbuf);
|
|
|
|
if (ret == 0)
|
|
fatal_error("TILEDATA registers did not change");
|
|
}
|
|
|
|
/* tiledata inheritance test */
|
|
|
|
static void test_fork(void)
|
|
{
|
|
pid_t child, grandchild;
|
|
|
|
child = fork();
|
|
if (child < 0) {
|
|
/* fork() failed */
|
|
fatal_error("fork");
|
|
} else if (child > 0) {
|
|
/* fork() succeeded. Now in the parent. */
|
|
int status;
|
|
|
|
wait(&status);
|
|
if (!WIFEXITED(status) || WEXITSTATUS(status))
|
|
fatal_error("fork test child");
|
|
return;
|
|
}
|
|
/* fork() succeeded. Now in the child. */
|
|
printf("[RUN]\tCheck tile data inheritance.\n\tBefore fork(), load tiledata\n");
|
|
|
|
load_rand_tiledata(stashed_xsave);
|
|
|
|
grandchild = fork();
|
|
if (grandchild < 0) {
|
|
/* fork() failed */
|
|
fatal_error("fork");
|
|
} else if (grandchild > 0) {
|
|
/* fork() succeeded. Still in the first child. */
|
|
int status;
|
|
|
|
wait(&status);
|
|
if (!WIFEXITED(status) || WEXITSTATUS(status))
|
|
fatal_error("fork test grand child");
|
|
_exit(0);
|
|
}
|
|
/* fork() succeeded. Now in the (grand)child. */
|
|
|
|
/*
|
|
* TILEDATA registers are not preserved across fork().
|
|
* Ensure that their value has changed:
|
|
*/
|
|
validate_tiledata_regs_changed(stashed_xsave);
|
|
|
|
_exit(0);
|
|
}
|
|
|
|
/* Context switching test */
|
|
|
|
static struct _ctxtswtest_cfg {
|
|
unsigned int iterations;
|
|
unsigned int num_threads;
|
|
} ctxtswtest_config;
|
|
|
|
struct futex_info {
|
|
pthread_t thread;
|
|
int nr;
|
|
pthread_mutex_t mutex;
|
|
struct futex_info *next;
|
|
};
|
|
|
|
static void *check_tiledata(void *info)
|
|
{
|
|
struct futex_info *finfo = (struct futex_info *)info;
|
|
struct xsave_buffer *xbuf;
|
|
int i;
|
|
|
|
xbuf = alloc_xbuf();
|
|
if (!xbuf)
|
|
fatal_error("unable to allocate XSAVE buffer");
|
|
|
|
/*
|
|
* Load random data into 'xbuf' and then restore
|
|
* it to the tile registers themselves.
|
|
*/
|
|
load_rand_tiledata(xbuf);
|
|
for (i = 0; i < ctxtswtest_config.iterations; i++) {
|
|
pthread_mutex_lock(&finfo->mutex);
|
|
|
|
/*
|
|
* Ensure the register values have not
|
|
* diverged from those recorded in 'xbuf'.
|
|
*/
|
|
validate_tiledata_regs_same(xbuf);
|
|
|
|
/* Load new, random values into xbuf and registers */
|
|
load_rand_tiledata(xbuf);
|
|
|
|
/*
|
|
* The last thread's last unlock will be for
|
|
* thread 0's mutex. However, thread 0 will
|
|
* have already exited the loop and the mutex
|
|
* will already be unlocked.
|
|
*
|
|
* Because this is not an ERRORCHECK mutex,
|
|
* that inconsistency will be silently ignored.
|
|
*/
|
|
pthread_mutex_unlock(&finfo->next->mutex);
|
|
}
|
|
|
|
free(xbuf);
|
|
/*
|
|
* Return this thread's finfo, which is
|
|
* a unique value for this thread.
|
|
*/
|
|
return finfo;
|
|
}
|
|
|
|
static int create_threads(int num, struct futex_info *finfo)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < num; i++) {
|
|
int next_nr;
|
|
|
|
finfo[i].nr = i;
|
|
/*
|
|
* Thread 'i' will wait on this mutex to
|
|
* be unlocked. Lock it immediately after
|
|
* initialization:
|
|
*/
|
|
pthread_mutex_init(&finfo[i].mutex, NULL);
|
|
pthread_mutex_lock(&finfo[i].mutex);
|
|
|
|
next_nr = (i + 1) % num;
|
|
finfo[i].next = &finfo[next_nr];
|
|
|
|
if (pthread_create(&finfo[i].thread, NULL, check_tiledata, &finfo[i]))
|
|
fatal_error("pthread_create()");
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void affinitize_cpu0(void)
|
|
{
|
|
cpu_set_t cpuset;
|
|
|
|
CPU_ZERO(&cpuset);
|
|
CPU_SET(0, &cpuset);
|
|
|
|
if (sched_setaffinity(0, sizeof(cpuset), &cpuset) != 0)
|
|
fatal_error("sched_setaffinity to CPU 0");
|
|
}
|
|
|
|
static void test_context_switch(void)
|
|
{
|
|
struct futex_info *finfo;
|
|
int i;
|
|
|
|
/* Affinitize to one CPU to force context switches */
|
|
affinitize_cpu0();
|
|
|
|
req_xtiledata_perm();
|
|
|
|
printf("[RUN]\tCheck tiledata context switches, %d iterations, %d threads.\n",
|
|
ctxtswtest_config.iterations,
|
|
ctxtswtest_config.num_threads);
|
|
|
|
|
|
finfo = malloc(sizeof(*finfo) * ctxtswtest_config.num_threads);
|
|
if (!finfo)
|
|
fatal_error("malloc()");
|
|
|
|
create_threads(ctxtswtest_config.num_threads, finfo);
|
|
|
|
/*
|
|
* This thread wakes up thread 0
|
|
* Thread 0 will wake up 1
|
|
* Thread 1 will wake up 2
|
|
* ...
|
|
* the last thread will wake up 0
|
|
*
|
|
* ... this will repeat for the configured
|
|
* number of iterations.
|
|
*/
|
|
pthread_mutex_unlock(&finfo[0].mutex);
|
|
|
|
/* Wait for all the threads to finish: */
|
|
for (i = 0; i < ctxtswtest_config.num_threads; i++) {
|
|
void *thread_retval;
|
|
int rc;
|
|
|
|
rc = pthread_join(finfo[i].thread, &thread_retval);
|
|
|
|
if (rc)
|
|
fatal_error("pthread_join() failed for thread %d err: %d\n",
|
|
i, rc);
|
|
|
|
if (thread_retval != &finfo[i])
|
|
fatal_error("unexpected thread retval for thread %d: %p\n",
|
|
i, thread_retval);
|
|
|
|
}
|
|
|
|
printf("[OK]\tNo incorrect case was found.\n");
|
|
|
|
free(finfo);
|
|
}
|
|
|
|
/* Ptrace test */
|
|
|
|
/*
|
|
* Make sure the ptracee has the expanded kernel buffer on the first
|
|
* use. Then, initialize the state before performing the state
|
|
* injection from the ptracer.
|
|
*/
|
|
static inline void ptracee_firstuse_tiledata(void)
|
|
{
|
|
load_rand_tiledata(stashed_xsave);
|
|
init_xtiledata();
|
|
}
|
|
|
|
/*
|
|
* Ptracer injects the randomized tile data state. It also reads
|
|
* before and after that, which will execute the kernel's state copy
|
|
* functions. So, the tester is advised to double-check any emitted
|
|
* kernel messages.
|
|
*/
|
|
static void ptracer_inject_tiledata(pid_t target)
|
|
{
|
|
struct xsave_buffer *xbuf;
|
|
struct iovec iov;
|
|
|
|
xbuf = alloc_xbuf();
|
|
if (!xbuf)
|
|
fatal_error("unable to allocate XSAVE buffer");
|
|
|
|
printf("\tRead the init'ed tiledata via ptrace().\n");
|
|
|
|
iov.iov_base = xbuf;
|
|
iov.iov_len = xbuf_size;
|
|
|
|
memset(stashed_xsave, 0, xbuf_size);
|
|
|
|
if (ptrace(PTRACE_GETREGSET, target, (uint32_t)NT_X86_XSTATE, &iov))
|
|
fatal_error("PTRACE_GETREGSET");
|
|
|
|
if (!__compare_tiledata_state(stashed_xsave, xbuf))
|
|
printf("[OK]\tThe init'ed tiledata was read from ptracee.\n");
|
|
else
|
|
printf("[FAIL]\tThe init'ed tiledata was not read from ptracee.\n");
|
|
|
|
printf("\tInject tiledata via ptrace().\n");
|
|
|
|
load_rand_tiledata(xbuf);
|
|
|
|
memcpy(&stashed_xsave->bytes[xtiledata.xbuf_offset],
|
|
&xbuf->bytes[xtiledata.xbuf_offset],
|
|
xtiledata.size);
|
|
|
|
if (ptrace(PTRACE_SETREGSET, target, (uint32_t)NT_X86_XSTATE, &iov))
|
|
fatal_error("PTRACE_SETREGSET");
|
|
|
|
if (ptrace(PTRACE_GETREGSET, target, (uint32_t)NT_X86_XSTATE, &iov))
|
|
fatal_error("PTRACE_GETREGSET");
|
|
|
|
if (!__compare_tiledata_state(stashed_xsave, xbuf))
|
|
printf("[OK]\tTiledata was correctly written to ptracee.\n");
|
|
else
|
|
printf("[FAIL]\tTiledata was not correctly written to ptracee.\n");
|
|
}
|
|
|
|
static void test_ptrace(void)
|
|
{
|
|
pid_t child;
|
|
int status;
|
|
|
|
child = fork();
|
|
if (child < 0) {
|
|
err(1, "fork");
|
|
} else if (!child) {
|
|
if (ptrace(PTRACE_TRACEME, 0, NULL, NULL))
|
|
err(1, "PTRACE_TRACEME");
|
|
|
|
ptracee_firstuse_tiledata();
|
|
|
|
raise(SIGTRAP);
|
|
_exit(0);
|
|
}
|
|
|
|
do {
|
|
wait(&status);
|
|
} while (WSTOPSIG(status) != SIGTRAP);
|
|
|
|
ptracer_inject_tiledata(child);
|
|
|
|
ptrace(PTRACE_DETACH, child, NULL, NULL);
|
|
wait(&status);
|
|
if (!WIFEXITED(status) || WEXITSTATUS(status))
|
|
err(1, "ptrace test");
|
|
}
|
|
|
|
int main(void)
|
|
{
|
|
/* Check hardware availability at first */
|
|
check_cpuid_xsave();
|
|
check_cpuid_xtiledata();
|
|
|
|
init_stashed_xsave();
|
|
sethandler(SIGILL, handle_noperm, 0);
|
|
|
|
test_dynamic_state();
|
|
|
|
/* Request permission for the following tests */
|
|
req_xtiledata_perm();
|
|
|
|
test_fork();
|
|
|
|
ctxtswtest_config.iterations = 10;
|
|
ctxtswtest_config.num_threads = 5;
|
|
test_context_switch();
|
|
|
|
test_ptrace();
|
|
|
|
clearhandler(SIGILL);
|
|
free_stashed_xsave();
|
|
|
|
return 0;
|
|
}
|