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c59a6a3e4e
This prevents us from inappropriately blocking in a KVM_SET_REGS ioctl -- the MSR[WE] will take effect when the guest is next entered. It also causes SRR1[WE] to be set when we enter the guest's interrupt handler, which is what e500 hardware is documented to do. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
982 lines
27 KiB
C
982 lines
27 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2007
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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* Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/kvm_host.h>
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#include <linux/gfp.h>
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <asm/cputable.h>
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#include <asm/uaccess.h>
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#include <asm/kvm_ppc.h>
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#include "timing.h"
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#include <asm/cacheflush.h>
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#include "booke.h"
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unsigned long kvmppc_booke_handlers;
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#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
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#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ "mmio", VCPU_STAT(mmio_exits) },
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{ "dcr", VCPU_STAT(dcr_exits) },
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{ "sig", VCPU_STAT(signal_exits) },
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{ "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
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{ "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
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{ "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
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{ "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
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{ "sysc", VCPU_STAT(syscall_exits) },
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{ "isi", VCPU_STAT(isi_exits) },
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{ "dsi", VCPU_STAT(dsi_exits) },
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{ "inst_emu", VCPU_STAT(emulated_inst_exits) },
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{ "dec", VCPU_STAT(dec_exits) },
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{ "ext_intr", VCPU_STAT(ext_intr_exits) },
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{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
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{ NULL }
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};
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/* TODO: use vcpu_printf() */
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void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
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{
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int i;
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printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
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printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
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printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
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vcpu->arch.shared->srr1);
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printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
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for (i = 0; i < 32; i += 4) {
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printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
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kvmppc_get_gpr(vcpu, i),
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kvmppc_get_gpr(vcpu, i+1),
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kvmppc_get_gpr(vcpu, i+2),
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kvmppc_get_gpr(vcpu, i+3));
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}
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}
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#ifdef CONFIG_SPE
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void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
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{
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preempt_disable();
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enable_kernel_spe();
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kvmppc_save_guest_spe(vcpu);
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vcpu->arch.shadow_msr &= ~MSR_SPE;
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preempt_enable();
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}
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static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
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{
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preempt_disable();
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enable_kernel_spe();
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kvmppc_load_guest_spe(vcpu);
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vcpu->arch.shadow_msr |= MSR_SPE;
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preempt_enable();
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}
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static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
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{
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if (vcpu->arch.shared->msr & MSR_SPE) {
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if (!(vcpu->arch.shadow_msr & MSR_SPE))
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kvmppc_vcpu_enable_spe(vcpu);
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} else if (vcpu->arch.shadow_msr & MSR_SPE) {
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kvmppc_vcpu_disable_spe(vcpu);
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}
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}
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#else
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static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
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{
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}
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#endif
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/*
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* Helper function for "full" MSR writes. No need to call this if only
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* EE/CE/ME/DE/RI are changing.
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*/
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void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
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{
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u32 old_msr = vcpu->arch.shared->msr;
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vcpu->arch.shared->msr = new_msr;
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kvmppc_mmu_msr_notify(vcpu, old_msr);
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kvmppc_vcpu_sync_spe(vcpu);
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}
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static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
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unsigned int priority)
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{
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set_bit(priority, &vcpu->arch.pending_exceptions);
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}
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static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
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ulong dear_flags, ulong esr_flags)
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{
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vcpu->arch.queued_dear = dear_flags;
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vcpu->arch.queued_esr = esr_flags;
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
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}
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static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
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ulong dear_flags, ulong esr_flags)
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{
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vcpu->arch.queued_dear = dear_flags;
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vcpu->arch.queued_esr = esr_flags;
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
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}
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static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
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ulong esr_flags)
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{
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vcpu->arch.queued_esr = esr_flags;
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
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}
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void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
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{
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vcpu->arch.queued_esr = esr_flags;
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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}
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void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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}
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int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
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{
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return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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}
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void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
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{
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clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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}
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void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
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struct kvm_interrupt *irq)
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{
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unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
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if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
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prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
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kvmppc_booke_queue_irqprio(vcpu, prio);
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}
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void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
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struct kvm_interrupt *irq)
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{
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clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
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clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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}
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/* Deliver the interrupt of the corresponding priority, if possible. */
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static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
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unsigned int priority)
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{
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int allowed = 0;
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ulong uninitialized_var(msr_mask);
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bool update_esr = false, update_dear = false;
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ulong crit_raw = vcpu->arch.shared->critical;
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ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
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bool crit;
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bool keep_irq = false;
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/* Truncate crit indicators in 32 bit mode */
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if (!(vcpu->arch.shared->msr & MSR_SF)) {
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crit_raw &= 0xffffffff;
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crit_r1 &= 0xffffffff;
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}
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/* Critical section when crit == r1 */
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crit = (crit_raw == crit_r1);
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/* ... and we're in supervisor mode */
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crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
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if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
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priority = BOOKE_IRQPRIO_EXTERNAL;
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keep_irq = true;
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}
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switch (priority) {
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case BOOKE_IRQPRIO_DTLB_MISS:
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case BOOKE_IRQPRIO_DATA_STORAGE:
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update_dear = true;
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/* fall through */
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case BOOKE_IRQPRIO_INST_STORAGE:
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case BOOKE_IRQPRIO_PROGRAM:
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update_esr = true;
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/* fall through */
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case BOOKE_IRQPRIO_ITLB_MISS:
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case BOOKE_IRQPRIO_SYSCALL:
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case BOOKE_IRQPRIO_FP_UNAVAIL:
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case BOOKE_IRQPRIO_SPE_UNAVAIL:
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case BOOKE_IRQPRIO_SPE_FP_DATA:
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case BOOKE_IRQPRIO_SPE_FP_ROUND:
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case BOOKE_IRQPRIO_AP_UNAVAIL:
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case BOOKE_IRQPRIO_ALIGNMENT:
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allowed = 1;
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msr_mask = MSR_CE|MSR_ME|MSR_DE;
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break;
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case BOOKE_IRQPRIO_CRITICAL:
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case BOOKE_IRQPRIO_WATCHDOG:
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allowed = vcpu->arch.shared->msr & MSR_CE;
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msr_mask = MSR_ME;
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break;
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case BOOKE_IRQPRIO_MACHINE_CHECK:
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allowed = vcpu->arch.shared->msr & MSR_ME;
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msr_mask = 0;
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break;
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case BOOKE_IRQPRIO_EXTERNAL:
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case BOOKE_IRQPRIO_DECREMENTER:
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case BOOKE_IRQPRIO_FIT:
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allowed = vcpu->arch.shared->msr & MSR_EE;
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allowed = allowed && !crit;
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msr_mask = MSR_CE|MSR_ME|MSR_DE;
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break;
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case BOOKE_IRQPRIO_DEBUG:
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allowed = vcpu->arch.shared->msr & MSR_DE;
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msr_mask = MSR_ME;
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break;
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}
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if (allowed) {
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vcpu->arch.shared->srr0 = vcpu->arch.pc;
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vcpu->arch.shared->srr1 = vcpu->arch.shared->msr;
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vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
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if (update_esr == true)
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vcpu->arch.esr = vcpu->arch.queued_esr;
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if (update_dear == true)
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vcpu->arch.shared->dar = vcpu->arch.queued_dear;
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kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
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if (!keep_irq)
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clear_bit(priority, &vcpu->arch.pending_exceptions);
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}
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return allowed;
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}
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static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
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{
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unsigned long *pending = &vcpu->arch.pending_exceptions;
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unsigned long old_pending = vcpu->arch.pending_exceptions;
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unsigned int priority;
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priority = __ffs(*pending);
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while (priority <= BOOKE_IRQPRIO_MAX) {
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if (kvmppc_booke_irqprio_deliver(vcpu, priority))
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break;
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priority = find_next_bit(pending,
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BITS_PER_BYTE * sizeof(*pending),
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priority + 1);
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}
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/* Tell the guest about our interrupt status */
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if (*pending)
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vcpu->arch.shared->int_pending = 1;
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else if (old_pending)
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vcpu->arch.shared->int_pending = 0;
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}
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/* Check pending exceptions and deliver one, if possible. */
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void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
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{
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WARN_ON_ONCE(!irqs_disabled());
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kvmppc_core_check_exceptions(vcpu);
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if (vcpu->arch.shared->msr & MSR_WE) {
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local_irq_enable();
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kvm_vcpu_block(vcpu);
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local_irq_disable();
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kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
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kvmppc_core_check_exceptions(vcpu);
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};
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}
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int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
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{
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int ret;
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if (!vcpu->arch.sane) {
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kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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return -EINVAL;
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}
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local_irq_disable();
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kvmppc_core_prepare_to_enter(vcpu);
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if (signal_pending(current)) {
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kvm_run->exit_reason = KVM_EXIT_INTR;
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ret = -EINTR;
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goto out;
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}
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kvm_guest_enter();
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ret = __kvmppc_vcpu_run(kvm_run, vcpu);
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kvm_guest_exit();
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out:
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local_irq_enable();
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return ret;
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}
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/**
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* kvmppc_handle_exit
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*
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* Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
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*/
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int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int exit_nr)
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{
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enum emulation_result er;
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int r = RESUME_HOST;
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/* update before a new last_exit_type is rewritten */
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kvmppc_update_timing_stats(vcpu);
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local_irq_enable();
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run->exit_reason = KVM_EXIT_UNKNOWN;
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run->ready_for_interrupt_injection = 1;
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switch (exit_nr) {
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case BOOKE_INTERRUPT_MACHINE_CHECK:
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printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
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kvmppc_dump_vcpu(vcpu);
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r = RESUME_HOST;
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break;
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case BOOKE_INTERRUPT_EXTERNAL:
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kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
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if (need_resched())
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cond_resched();
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r = RESUME_GUEST;
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break;
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case BOOKE_INTERRUPT_DECREMENTER:
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/* Since we switched IVPR back to the host's value, the host
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* handled this interrupt the moment we enabled interrupts.
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* Now we just offer it a chance to reschedule the guest. */
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kvmppc_account_exit(vcpu, DEC_EXITS);
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if (need_resched())
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cond_resched();
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r = RESUME_GUEST;
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break;
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case BOOKE_INTERRUPT_PROGRAM:
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if (vcpu->arch.shared->msr & MSR_PR) {
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/* Program traps generated by user-level software must be handled
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* by the guest kernel. */
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kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
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r = RESUME_GUEST;
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kvmppc_account_exit(vcpu, USR_PR_INST);
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break;
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}
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er = kvmppc_emulate_instruction(run, vcpu);
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switch (er) {
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case EMULATE_DONE:
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/* don't overwrite subtypes, just account kvm_stats */
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kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
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/* Future optimization: only reload non-volatiles if
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* they were actually modified by emulation. */
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r = RESUME_GUEST_NV;
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break;
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case EMULATE_DO_DCR:
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run->exit_reason = KVM_EXIT_DCR;
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r = RESUME_HOST;
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break;
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case EMULATE_FAIL:
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/* XXX Deliver Program interrupt to guest. */
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printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
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__func__, vcpu->arch.pc, vcpu->arch.last_inst);
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/* For debugging, encode the failing instruction and
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* report it to userspace. */
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run->hw.hardware_exit_reason = ~0ULL << 32;
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run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
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r = RESUME_HOST;
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break;
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default:
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BUG();
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}
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break;
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case BOOKE_INTERRUPT_FP_UNAVAIL:
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
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kvmppc_account_exit(vcpu, FP_UNAVAIL);
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r = RESUME_GUEST;
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break;
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#ifdef CONFIG_SPE
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case BOOKE_INTERRUPT_SPE_UNAVAIL: {
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if (vcpu->arch.shared->msr & MSR_SPE)
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kvmppc_vcpu_enable_spe(vcpu);
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else
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kvmppc_booke_queue_irqprio(vcpu,
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BOOKE_IRQPRIO_SPE_UNAVAIL);
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r = RESUME_GUEST;
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break;
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}
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case BOOKE_INTERRUPT_SPE_FP_DATA:
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|
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
|
|
r = RESUME_GUEST;
|
|
break;
|
|
|
|
case BOOKE_INTERRUPT_SPE_FP_ROUND:
|
|
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
|
|
r = RESUME_GUEST;
|
|
break;
|
|
#else
|
|
case BOOKE_INTERRUPT_SPE_UNAVAIL:
|
|
/*
|
|
* Guest wants SPE, but host kernel doesn't support it. Send
|
|
* an "unimplemented operation" program check to the guest.
|
|
*/
|
|
kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
|
|
r = RESUME_GUEST;
|
|
break;
|
|
|
|
/*
|
|
* These really should never happen without CONFIG_SPE,
|
|
* as we should never enable the real MSR[SPE] in the guest.
|
|
*/
|
|
case BOOKE_INTERRUPT_SPE_FP_DATA:
|
|
case BOOKE_INTERRUPT_SPE_FP_ROUND:
|
|
printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
|
|
__func__, exit_nr, vcpu->arch.pc);
|
|
run->hw.hardware_exit_reason = exit_nr;
|
|
r = RESUME_HOST;
|
|
break;
|
|
#endif
|
|
|
|
case BOOKE_INTERRUPT_DATA_STORAGE:
|
|
kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
|
|
vcpu->arch.fault_esr);
|
|
kvmppc_account_exit(vcpu, DSI_EXITS);
|
|
r = RESUME_GUEST;
|
|
break;
|
|
|
|
case BOOKE_INTERRUPT_INST_STORAGE:
|
|
kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
|
|
kvmppc_account_exit(vcpu, ISI_EXITS);
|
|
r = RESUME_GUEST;
|
|
break;
|
|
|
|
case BOOKE_INTERRUPT_SYSCALL:
|
|
if (!(vcpu->arch.shared->msr & MSR_PR) &&
|
|
(((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
|
|
/* KVM PV hypercalls */
|
|
kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
|
|
r = RESUME_GUEST;
|
|
} else {
|
|
/* Guest syscalls */
|
|
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
|
|
}
|
|
kvmppc_account_exit(vcpu, SYSCALL_EXITS);
|
|
r = RESUME_GUEST;
|
|
break;
|
|
|
|
case BOOKE_INTERRUPT_DTLB_MISS: {
|
|
unsigned long eaddr = vcpu->arch.fault_dear;
|
|
int gtlb_index;
|
|
gpa_t gpaddr;
|
|
gfn_t gfn;
|
|
|
|
#ifdef CONFIG_KVM_E500
|
|
if (!(vcpu->arch.shared->msr & MSR_PR) &&
|
|
(eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
|
|
kvmppc_map_magic(vcpu);
|
|
kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
|
|
r = RESUME_GUEST;
|
|
|
|
break;
|
|
}
|
|
#endif
|
|
|
|
/* Check the guest TLB. */
|
|
gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
|
|
if (gtlb_index < 0) {
|
|
/* The guest didn't have a mapping for it. */
|
|
kvmppc_core_queue_dtlb_miss(vcpu,
|
|
vcpu->arch.fault_dear,
|
|
vcpu->arch.fault_esr);
|
|
kvmppc_mmu_dtlb_miss(vcpu);
|
|
kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
|
|
r = RESUME_GUEST;
|
|
break;
|
|
}
|
|
|
|
gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
|
|
gfn = gpaddr >> PAGE_SHIFT;
|
|
|
|
if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
|
|
/* The guest TLB had a mapping, but the shadow TLB
|
|
* didn't, and it is RAM. This could be because:
|
|
* a) the entry is mapping the host kernel, or
|
|
* b) the guest used a large mapping which we're faking
|
|
* Either way, we need to satisfy the fault without
|
|
* invoking the guest. */
|
|
kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
|
|
kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
|
|
r = RESUME_GUEST;
|
|
} else {
|
|
/* Guest has mapped and accessed a page which is not
|
|
* actually RAM. */
|
|
vcpu->arch.paddr_accessed = gpaddr;
|
|
r = kvmppc_emulate_mmio(run, vcpu);
|
|
kvmppc_account_exit(vcpu, MMIO_EXITS);
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
case BOOKE_INTERRUPT_ITLB_MISS: {
|
|
unsigned long eaddr = vcpu->arch.pc;
|
|
gpa_t gpaddr;
|
|
gfn_t gfn;
|
|
int gtlb_index;
|
|
|
|
r = RESUME_GUEST;
|
|
|
|
/* Check the guest TLB. */
|
|
gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
|
|
if (gtlb_index < 0) {
|
|
/* The guest didn't have a mapping for it. */
|
|
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
|
|
kvmppc_mmu_itlb_miss(vcpu);
|
|
kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
|
|
break;
|
|
}
|
|
|
|
kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
|
|
|
|
gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
|
|
gfn = gpaddr >> PAGE_SHIFT;
|
|
|
|
if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
|
|
/* The guest TLB had a mapping, but the shadow TLB
|
|
* didn't. This could be because:
|
|
* a) the entry is mapping the host kernel, or
|
|
* b) the guest used a large mapping which we're faking
|
|
* Either way, we need to satisfy the fault without
|
|
* invoking the guest. */
|
|
kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
|
|
} else {
|
|
/* Guest mapped and leaped at non-RAM! */
|
|
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
case BOOKE_INTERRUPT_DEBUG: {
|
|
u32 dbsr;
|
|
|
|
vcpu->arch.pc = mfspr(SPRN_CSRR0);
|
|
|
|
/* clear IAC events in DBSR register */
|
|
dbsr = mfspr(SPRN_DBSR);
|
|
dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
|
|
mtspr(SPRN_DBSR, dbsr);
|
|
|
|
run->exit_reason = KVM_EXIT_DEBUG;
|
|
kvmppc_account_exit(vcpu, DEBUG_EXITS);
|
|
r = RESUME_HOST;
|
|
break;
|
|
}
|
|
|
|
default:
|
|
printk(KERN_EMERG "exit_nr %d\n", exit_nr);
|
|
BUG();
|
|
}
|
|
|
|
local_irq_disable();
|
|
|
|
kvmppc_core_prepare_to_enter(vcpu);
|
|
|
|
if (!(r & RESUME_HOST)) {
|
|
/* To avoid clobbering exit_reason, only check for signals if
|
|
* we aren't already exiting to userspace for some other
|
|
* reason. */
|
|
if (signal_pending(current)) {
|
|
run->exit_reason = KVM_EXIT_INTR;
|
|
r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
|
|
kvmppc_account_exit(vcpu, SIGNAL_EXITS);
|
|
}
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
|
|
int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
|
|
{
|
|
int i;
|
|
int r;
|
|
|
|
vcpu->arch.pc = 0;
|
|
vcpu->arch.shared->msr = 0;
|
|
vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
|
|
kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
|
|
|
|
vcpu->arch.shadow_pid = 1;
|
|
|
|
/* Eye-catching numbers so we know if the guest takes an interrupt
|
|
* before it's programmed its own IVPR/IVORs. */
|
|
vcpu->arch.ivpr = 0x55550000;
|
|
for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
|
|
vcpu->arch.ivor[i] = 0x7700 | i * 4;
|
|
|
|
kvmppc_init_timing_stats(vcpu);
|
|
|
|
r = kvmppc_core_vcpu_setup(vcpu);
|
|
kvmppc_sanity_check(vcpu);
|
|
return r;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
{
|
|
int i;
|
|
|
|
regs->pc = vcpu->arch.pc;
|
|
regs->cr = kvmppc_get_cr(vcpu);
|
|
regs->ctr = vcpu->arch.ctr;
|
|
regs->lr = vcpu->arch.lr;
|
|
regs->xer = kvmppc_get_xer(vcpu);
|
|
regs->msr = vcpu->arch.shared->msr;
|
|
regs->srr0 = vcpu->arch.shared->srr0;
|
|
regs->srr1 = vcpu->arch.shared->srr1;
|
|
regs->pid = vcpu->arch.pid;
|
|
regs->sprg0 = vcpu->arch.shared->sprg0;
|
|
regs->sprg1 = vcpu->arch.shared->sprg1;
|
|
regs->sprg2 = vcpu->arch.shared->sprg2;
|
|
regs->sprg3 = vcpu->arch.shared->sprg3;
|
|
regs->sprg4 = vcpu->arch.sprg4;
|
|
regs->sprg5 = vcpu->arch.sprg5;
|
|
regs->sprg6 = vcpu->arch.sprg6;
|
|
regs->sprg7 = vcpu->arch.sprg7;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
|
regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
{
|
|
int i;
|
|
|
|
vcpu->arch.pc = regs->pc;
|
|
kvmppc_set_cr(vcpu, regs->cr);
|
|
vcpu->arch.ctr = regs->ctr;
|
|
vcpu->arch.lr = regs->lr;
|
|
kvmppc_set_xer(vcpu, regs->xer);
|
|
kvmppc_set_msr(vcpu, regs->msr);
|
|
vcpu->arch.shared->srr0 = regs->srr0;
|
|
vcpu->arch.shared->srr1 = regs->srr1;
|
|
kvmppc_set_pid(vcpu, regs->pid);
|
|
vcpu->arch.shared->sprg0 = regs->sprg0;
|
|
vcpu->arch.shared->sprg1 = regs->sprg1;
|
|
vcpu->arch.shared->sprg2 = regs->sprg2;
|
|
vcpu->arch.shared->sprg3 = regs->sprg3;
|
|
vcpu->arch.sprg4 = regs->sprg4;
|
|
vcpu->arch.sprg5 = regs->sprg5;
|
|
vcpu->arch.sprg6 = regs->sprg6;
|
|
vcpu->arch.sprg7 = regs->sprg7;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
|
kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void get_sregs_base(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
u64 tb = get_tb();
|
|
|
|
sregs->u.e.features |= KVM_SREGS_E_BASE;
|
|
|
|
sregs->u.e.csrr0 = vcpu->arch.csrr0;
|
|
sregs->u.e.csrr1 = vcpu->arch.csrr1;
|
|
sregs->u.e.mcsr = vcpu->arch.mcsr;
|
|
sregs->u.e.esr = vcpu->arch.esr;
|
|
sregs->u.e.dear = vcpu->arch.shared->dar;
|
|
sregs->u.e.tsr = vcpu->arch.tsr;
|
|
sregs->u.e.tcr = vcpu->arch.tcr;
|
|
sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
|
|
sregs->u.e.tb = tb;
|
|
sregs->u.e.vrsave = vcpu->arch.vrsave;
|
|
}
|
|
|
|
static int set_sregs_base(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
|
|
return 0;
|
|
|
|
vcpu->arch.csrr0 = sregs->u.e.csrr0;
|
|
vcpu->arch.csrr1 = sregs->u.e.csrr1;
|
|
vcpu->arch.mcsr = sregs->u.e.mcsr;
|
|
vcpu->arch.esr = sregs->u.e.esr;
|
|
vcpu->arch.shared->dar = sregs->u.e.dear;
|
|
vcpu->arch.vrsave = sregs->u.e.vrsave;
|
|
vcpu->arch.tcr = sregs->u.e.tcr;
|
|
|
|
if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC)
|
|
vcpu->arch.dec = sregs->u.e.dec;
|
|
|
|
kvmppc_emulate_dec(vcpu);
|
|
|
|
if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
|
|
/*
|
|
* FIXME: existing KVM timer handling is incomplete.
|
|
* TSR cannot be read by the guest, and its value in
|
|
* vcpu->arch is always zero. For now, just handle
|
|
* the case where the caller is trying to inject a
|
|
* decrementer interrupt.
|
|
*/
|
|
|
|
if ((sregs->u.e.tsr & TSR_DIS) &&
|
|
(vcpu->arch.tcr & TCR_DIE))
|
|
kvmppc_core_queue_dec(vcpu);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void get_sregs_arch206(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
sregs->u.e.features |= KVM_SREGS_E_ARCH206;
|
|
|
|
sregs->u.e.pir = vcpu->vcpu_id;
|
|
sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
|
|
sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
|
|
sregs->u.e.decar = vcpu->arch.decar;
|
|
sregs->u.e.ivpr = vcpu->arch.ivpr;
|
|
}
|
|
|
|
static int set_sregs_arch206(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
|
|
return 0;
|
|
|
|
if (sregs->u.e.pir != vcpu->vcpu_id)
|
|
return -EINVAL;
|
|
|
|
vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
|
|
vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
|
|
vcpu->arch.decar = sregs->u.e.decar;
|
|
vcpu->arch.ivpr = sregs->u.e.ivpr;
|
|
|
|
return 0;
|
|
}
|
|
|
|
void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
|
|
{
|
|
sregs->u.e.features |= KVM_SREGS_E_IVOR;
|
|
|
|
sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
|
|
sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
|
|
sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
|
|
sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
|
|
sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
|
|
sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
|
|
sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
|
|
sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
|
|
sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
|
|
sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
|
|
sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
|
|
sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
|
|
sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
|
|
sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
|
|
sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
|
|
sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
|
|
}
|
|
|
|
int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
|
|
{
|
|
if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
|
|
return 0;
|
|
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
|
|
vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
sregs->pvr = vcpu->arch.pvr;
|
|
|
|
get_sregs_base(vcpu, sregs);
|
|
get_sregs_arch206(vcpu, sregs);
|
|
kvmppc_core_get_sregs(vcpu, sregs);
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
|
|
struct kvm_sregs *sregs)
|
|
{
|
|
int ret;
|
|
|
|
if (vcpu->arch.pvr != sregs->pvr)
|
|
return -EINVAL;
|
|
|
|
ret = set_sregs_base(vcpu, sregs);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = set_sregs_arch206(vcpu, sregs);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return kvmppc_core_set_sregs(vcpu, sregs);
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
|
|
struct kvm_translation *tr)
|
|
{
|
|
int r;
|
|
|
|
r = kvmppc_core_vcpu_translate(vcpu, tr);
|
|
return r;
|
|
}
|
|
|
|
int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
int kvmppc_core_prepare_memory_region(struct kvm *kvm,
|
|
struct kvm_userspace_memory_region *mem)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void kvmppc_core_commit_memory_region(struct kvm *kvm,
|
|
struct kvm_userspace_memory_region *mem)
|
|
{
|
|
}
|
|
|
|
int kvmppc_core_init_vm(struct kvm *kvm)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void kvmppc_core_destroy_vm(struct kvm *kvm)
|
|
{
|
|
}
|
|
|
|
int __init kvmppc_booke_init(void)
|
|
{
|
|
unsigned long ivor[16];
|
|
unsigned long max_ivor = 0;
|
|
int i;
|
|
|
|
/* We install our own exception handlers by hijacking IVPR. IVPR must
|
|
* be 16-bit aligned, so we need a 64KB allocation. */
|
|
kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
|
|
VCPU_SIZE_ORDER);
|
|
if (!kvmppc_booke_handlers)
|
|
return -ENOMEM;
|
|
|
|
/* XXX make sure our handlers are smaller than Linux's */
|
|
|
|
/* Copy our interrupt handlers to match host IVORs. That way we don't
|
|
* have to swap the IVORs on every guest/host transition. */
|
|
ivor[0] = mfspr(SPRN_IVOR0);
|
|
ivor[1] = mfspr(SPRN_IVOR1);
|
|
ivor[2] = mfspr(SPRN_IVOR2);
|
|
ivor[3] = mfspr(SPRN_IVOR3);
|
|
ivor[4] = mfspr(SPRN_IVOR4);
|
|
ivor[5] = mfspr(SPRN_IVOR5);
|
|
ivor[6] = mfspr(SPRN_IVOR6);
|
|
ivor[7] = mfspr(SPRN_IVOR7);
|
|
ivor[8] = mfspr(SPRN_IVOR8);
|
|
ivor[9] = mfspr(SPRN_IVOR9);
|
|
ivor[10] = mfspr(SPRN_IVOR10);
|
|
ivor[11] = mfspr(SPRN_IVOR11);
|
|
ivor[12] = mfspr(SPRN_IVOR12);
|
|
ivor[13] = mfspr(SPRN_IVOR13);
|
|
ivor[14] = mfspr(SPRN_IVOR14);
|
|
ivor[15] = mfspr(SPRN_IVOR15);
|
|
|
|
for (i = 0; i < 16; i++) {
|
|
if (ivor[i] > max_ivor)
|
|
max_ivor = ivor[i];
|
|
|
|
memcpy((void *)kvmppc_booke_handlers + ivor[i],
|
|
kvmppc_handlers_start + i * kvmppc_handler_len,
|
|
kvmppc_handler_len);
|
|
}
|
|
flush_icache_range(kvmppc_booke_handlers,
|
|
kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void __exit kvmppc_booke_exit(void)
|
|
{
|
|
free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
|
|
kvm_exit();
|
|
}
|