Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-12-13 06:32:50 +00:00
Code Issues Packages Projects Releases Wiki Activity
c595713da7
linux/arch/arm/mach-omap2/mux.c
Tony Lindgren 9330899e0f ARM: OMAP2: Clean-up mux code 
Misc clean-up for the mux code and remove some unnecessary
ifdefs. Patch changes debug function so it can be used on
both 24xx and 34xx.

Changes are mostly for omap2, but patch also cleans up some
omap1 and common mux code.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-04-14 09:57:13 -07:00

282 lines
10 KiB
C
Raw Blame History

/*
* linux/arch/arm/mach-omap2/mux.c
*
* OMAP2 pin multiplexing configurations
*
* Copyright (C) 2004 - 2008 Texas Instruments Inc.
* Copyright (C) 2003 - 2008 Nokia Corporation
*
* Written by Tony Lindgren
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <asm/system.h>
#include <asm/io.h>
#include <linux/spinlock.h>
#include <asm/arch/mux.h>
#ifdef CONFIG_OMAP_MUX
static struct omap_mux_cfg arch_mux_cfg;
/* NOTE: See mux.h for the enumeration */
#ifdef CONFIG_ARCH_OMAP24XX
static struct pin_config __initdata_or_module omap24xx_pins[] = {
/*
* description mux mux pull pull debug
* offset mode ena type
*/
/* 24xx I2C */
MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1)
MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
/* Menelaus interrupt */
MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
/* 24xx clocks */
MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
/* 24xx GPMC chipselects, wait pin monitoring */
MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1)
MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1)
MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1)
/* 24xx McBSP */
MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
/* 24xx GPIO */
MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1)
MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
MUX_CFG_24XX("N15_24XX_GPIO85", 0x103, 3, 0, 0, 1)
MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
MUX_CFG_24XX("P20_24XX_GPIO93", 0x10b, 3, 0, 0, 1)
MUX_CFG_24XX("P18_24XX_GPIO95", 0x10d, 3, 0, 0, 1)
MUX_CFG_24XX("M18_24XX_GPIO96", 0x10e, 3, 0, 0, 1)
MUX_CFG_24XX("L14_24XX_GPIO97", 0x10f, 3, 0, 0, 1)
MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1)
/* 242x DBG GPIO */
MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1)
MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1)
MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1)
MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1)
MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1)
MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1)
MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1)
MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
/* 24xx external DMA requests */
MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
/* UART3 */
MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
/* MMC/SDIO */
MUX_CFG_24XX("G19_24XX_MMC_CLKO", 0x0f3, 0, 0, 0, 1)
MUX_CFG_24XX("H18_24XX_MMC_CMD", 0x0f4, 0, 0, 0, 1)
MUX_CFG_24XX("F20_24XX_MMC_DAT0", 0x0f5, 0, 0, 0, 1)
MUX_CFG_24XX("H14_24XX_MMC_DAT1", 0x0f6, 0, 0, 0, 1)
MUX_CFG_24XX("E19_24XX_MMC_DAT2", 0x0f7, 0, 0, 0, 1)
MUX_CFG_24XX("D19_24XX_MMC_DAT3", 0x0f8, 0, 0, 0, 1)
MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0", 0x0f9, 0, 0, 0, 1)
MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1", 0x0fa, 0, 0, 0, 1)
MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2", 0x0fb, 0, 0, 0, 1)
MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1)
MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
/* Full speed USB */
MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1)
MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1)
MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1)
MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1)
MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1)
MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1)
MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1)
MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1)
MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1)
MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1)
MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1)
MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1)
MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1)
MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1)
MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1)
MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1)
MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1)
MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1)
MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1)
MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1)
/* Keypad GPIO*/
MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1)
MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1)
MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1)
MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1)
MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1)
MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1)
MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1)
MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1)
MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1)
MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1)
MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1)
/* 24xx Menelaus Keypad GPIO */
MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1)
MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1)
MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1)
/* 2430 USB */
MUX_CFG_24XX("AD9_2430_USB0_PUEN", 0x133, 4, 0, 0, 1)
MUX_CFG_24XX("Y11_2430_USB0_VP", 0x134, 4, 0, 0, 1)
MUX_CFG_24XX("AD7_2430_USB0_VM", 0x135, 4, 0, 0, 1)
MUX_CFG_24XX("AE7_2430_USB0_RCV", 0x136, 4, 0, 0, 1)
MUX_CFG_24XX("AD4_2430_USB0_TXEN", 0x137, 4, 0, 0, 1)
MUX_CFG_24XX("AF9_2430_USB0_SE0", 0x138, 4, 0, 0, 1)
MUX_CFG_24XX("AE6_2430_USB0_DAT", 0x139, 4, 0, 0, 1)
MUX_CFG_24XX("AD24_2430_USB1_SE0", 0x107, 2, 0, 0, 1)
MUX_CFG_24XX("AB24_2430_USB1_RCV", 0x108, 2, 0, 0, 1)
MUX_CFG_24XX("Y25_2430_USB1_TXEN", 0x109, 2, 0, 0, 1)
MUX_CFG_24XX("AA26_2430_USB1_DAT", 0x10A, 2, 0, 0, 1)
/* 2430 HS-USB */
MUX_CFG_24XX("AD9_2430_USB0HS_DATA3", 0x133, 0, 0, 0, 1)
MUX_CFG_24XX("Y11_2430_USB0HS_DATA4", 0x134, 0, 0, 0, 1)
MUX_CFG_24XX("AD7_2430_USB0HS_DATA5", 0x135, 0, 0, 0, 1)
MUX_CFG_24XX("AE7_2430_USB0HS_DATA6", 0x136, 0, 0, 0, 1)
MUX_CFG_24XX("AD4_2430_USB0HS_DATA2", 0x137, 0, 0, 0, 1)
MUX_CFG_24XX("AF9_2430_USB0HS_DATA0", 0x138, 0, 0, 0, 1)
MUX_CFG_24XX("AE6_2430_USB0HS_DATA1", 0x139, 0, 0, 0, 1)
MUX_CFG_24XX("AE8_2430_USB0HS_CLK", 0x13A, 0, 0, 0, 1)
MUX_CFG_24XX("AD8_2430_USB0HS_DIR", 0x13B, 0, 0, 0, 1)
MUX_CFG_24XX("AE5_2430_USB0HS_STP", 0x13c, 0, 1, 1, 1)
MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1)
MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1)
/* 2430 McBSP */
MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1)
MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1)
MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1)
MUX_CFG_24XX("AD13_2430_MCBSP2_DR", 0x0131, 1, 0, 0, 1)
MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1)
MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1)
MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1)
MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
};
#define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins)
#else
#define omap24xx_pins NULL
#define OMAP24XX_PINS_SZ 0
#endif /* CONFIG_ARCH_OMAP24XX */
#define OMAP24XX_L4_BASE 0x48000000
#define OMAP24XX_PULL_ENA (1 << 3)
#define OMAP24XX_PULL_UP (1 << 4)
/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg)
{
u16 orig;
u8 warn = 0, debug = 0;
orig = omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg);
#ifdef CONFIG_OMAP_MUX_DEBUG
debug = cfg->debug;
#endif
warn = (orig != reg);
if (debug || warn)
printk(KERN_WARNING
"MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",
cfg->name, omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg));
}
#else
#define omap2_cfg_debug(x, y) do {} while (0)
#endif
#ifdef CONFIG_ARCH_OMAP24XX
int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
{
static DEFINE_SPINLOCK(mux_spin_lock);
unsigned long flags;
u8 reg = 0;
spin_lock_irqsave(&mux_spin_lock, flags);
reg |= cfg->mask & 0x7;
if (cfg->pull_val)
reg |= OMAP24XX_PULL_ENA;
if (cfg->pu_pd_val)
reg |= OMAP24XX_PULL_UP;
omap2_cfg_debug(cfg, reg);
omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
return 0;
}
#else
#define omap24xx_cfg_reg 0
#endif
int __init omap2_mux_init(void)
{
if (cpu_is_omap24xx()) {
arch_mux_cfg.pins = omap24xx_pins;
arch_mux_cfg.size = OMAP24XX_PINS_SZ;
arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
}
return omap_mux_register(&arch_mux_cfg);
}
#endif
Reference in New Issue View Git Blame Copy Permalink