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c4eed62a21
The secondary bus reset may have link side effects that a hotplug capable port may incorrectly react to. Use the slot specific reset for hotplug ports, fixing the undesirable link down-up handling during error recovering. Signed-off-by: Keith Busch <keith.busch@intel.com> [bhelgaas: fold in https://lore.kernel.org/linux-pci/20180926152326.14821-1-keith.busch@intel.com for issue reported by Stephen Rothwell <sfr@canb.auug.org.au>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Sinan Kaya <okaya@kernel.org> |
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.. | ||
aer_inject.c | ||
aer.c | ||
aspm.c | ||
dpc.c | ||
err.c | ||
Kconfig | ||
Makefile | ||
pme.c | ||
portdrv_core.c | ||
portdrv_pci.c | ||
portdrv.h | ||
ptm.c |