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This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Paul Mundt <lethal@linux-sh.org>
126 lines
4.1 KiB
C
126 lines
4.1 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* Handle issues around the Tile "home cache" model of coherence.
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*/
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#ifndef _ASM_TILE_HOMECACHE_H
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#define _ASM_TILE_HOMECACHE_H
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#include <asm/page.h>
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#include <linux/cpumask.h>
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struct page;
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struct task_struct;
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struct vm_area_struct;
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struct zone;
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/*
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* Coherence point for the page is its memory controller.
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* It is not present in any cache (L1 or L2).
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*/
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#define PAGE_HOME_UNCACHED -1
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/*
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* Is this page immutable (unwritable) and thus able to be cached more
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* widely than would otherwise be possible? On tile64 this means we
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* mark the PTE to cache locally; on tilepro it means we have "nc" set.
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*/
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#define PAGE_HOME_IMMUTABLE -2
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/*
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* Each cpu considers its own cache to be the home for the page,
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* which makes it incoherent.
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*/
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#define PAGE_HOME_INCOHERENT -3
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#if CHIP_HAS_CBOX_HOME_MAP()
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/* Home for the page is distributed via hash-for-home. */
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#define PAGE_HOME_HASH -4
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#endif
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/* Homing is unknown or unspecified. Not valid for page_home(). */
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#define PAGE_HOME_UNKNOWN -5
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/* Home on the current cpu. Not valid for page_home(). */
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#define PAGE_HOME_HERE -6
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/* Support wrapper to use instead of explicit hv_flush_remote(). */
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extern void flush_remote(unsigned long cache_pfn, unsigned long cache_length,
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const struct cpumask *cache_cpumask,
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HV_VirtAddr tlb_va, unsigned long tlb_length,
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unsigned long tlb_pgsize,
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const struct cpumask *tlb_cpumask,
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HV_Remote_ASID *asids, int asidcount);
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/* Set homing-related bits in a PTE (can also pass a pgprot_t). */
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extern pte_t pte_set_home(pte_t pte, int home);
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/* Do a cache eviction on the specified cpus. */
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extern void homecache_evict(const struct cpumask *mask);
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/*
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* Change a kernel page's homecache. It must not be mapped in user space.
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* If !CONFIG_HOMECACHE, only usable on LOWMEM, and can only be called when
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* no other cpu can reference the page, and causes a full-chip cache/TLB flush.
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*/
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extern void homecache_change_page_home(struct page *, int order, int home);
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/*
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* Flush a page out of whatever cache(s) it is in.
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* This is more than just finv, since it properly handles waiting
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* for the data to reach memory on tilepro, but it can be quite
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* heavyweight, particularly on hash-for-home memory.
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*/
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extern void homecache_flush_cache(struct page *, int order);
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/*
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* Allocate a page with the given GFP flags, home, and optionally
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* node. These routines are actually just wrappers around the normal
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* alloc_pages() / alloc_pages_node() functions, which set and clear
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* a per-cpu variable to communicate with homecache_new_kernel_page().
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* If !CONFIG_HOMECACHE, uses homecache_change_page_home().
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*/
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extern struct page *homecache_alloc_pages(gfp_t gfp_mask,
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unsigned int order, int home);
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extern struct page *homecache_alloc_pages_node(int nid, gfp_t gfp_mask,
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unsigned int order, int home);
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#define homecache_alloc_page(gfp_mask, home) \
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homecache_alloc_pages(gfp_mask, 0, home)
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/*
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* These routines are just pass-throughs to free_pages() when
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* we support full homecaching. If !CONFIG_HOMECACHE, then these
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* routines use homecache_change_page_home() to reset the home
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* back to the default before returning the page to the allocator.
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*/
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void homecache_free_pages(unsigned long addr, unsigned int order);
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#define homecache_free_page(page) \
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homecache_free_pages((page), 0)
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/*
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* Report the page home for LOWMEM pages by examining their kernel PTE,
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* or for highmem pages as the default home.
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*/
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extern int page_home(struct page *);
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#define homecache_migrate_kthread() do {} while (0)
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#define homecache_kpte_lock() 0
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#define homecache_kpte_unlock(flags) do {} while (0)
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#endif /* _ASM_TILE_HOMECACHE_H */
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